feat(amp): load prototype EQ when the amplifier starts
Write the captured AD85050 channel EQ into coefficient RAM before unmute so boot matches the prototype instead of the chip bypass defaults. Co-authored-by: Cursor <cursoragent@cursor.com>
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@ -247,13 +247,13 @@ static AD85020B_StatusTypeDef AD85020B_RamWaitClear(uint8_t mask)
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return AD85020B_TIMEOUT;
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return AD85020B_TIMEOUT;
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}
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}
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/* 手册:CFA 只收 7 位;表中 0xA0~0xAE 与 CH1 同址、靠 RBS 分 bank。
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/* 样机抓包:0x1D 写完整 RAM 地址,0x2D bit6=RBS 选 bank。
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Channel-2 EQ16/17/18 用 bank=1。 */
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Channel-1 = bank 0,Channel-2 = bank 1。 */
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AD85020B_StatusTypeDef AD85020B_RamWrite24(uint8_t ram_addr, uint8_t bank, uint32_t value)
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AD85020B_StatusTypeDef AD85020B_RamWrite24(uint8_t ram_addr, uint8_t bank, uint32_t value)
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{
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{
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uint8_t cfrw;
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uint8_t cfrw;
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if (AD85020B_I2C_Write(AD85020B_REG_CFA, (uint8_t)(ram_addr & 0x7FU)) != AD85020B_OK)
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if (AD85020B_I2C_Write(AD85020B_REG_CFA, ram_addr) != AD85020B_OK)
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return AD85020B_ERROR;
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return AD85020B_ERROR;
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if (AD85020B_I2C_Write(AD85020B_REG_A1_T, (uint8_t)((value >> 16) & 0xFFU)) != AD85020B_OK)
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if (AD85020B_I2C_Write(AD85020B_REG_A1_T, (uint8_t)((value >> 16) & 0xFFU)) != AD85020B_OK)
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return AD85020B_ERROR;
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return AD85020B_ERROR;
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@ -275,7 +275,7 @@ AD85020B_StatusTypeDef AD85020B_RamRead24(uint8_t ram_addr, uint8_t bank, uint32
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if (value == 0)
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if (value == 0)
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return AD85020B_ERROR;
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return AD85020B_ERROR;
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if (AD85020B_I2C_Write(AD85020B_REG_CFA, (uint8_t)(ram_addr & 0x7FU)) != AD85020B_OK)
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if (AD85020B_I2C_Write(AD85020B_REG_CFA, ram_addr) != AD85020B_OK)
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return AD85020B_ERROR;
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return AD85020B_ERROR;
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cfrw = (uint8_t)(AD85020B_CFRW_R1 | (bank ? AD85020B_CFRW_RBS : 0U));
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cfrw = (uint8_t)(AD85020B_CFRW_R1 | (bank ? AD85020B_CFRW_RBS : 0U));
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@ -295,6 +295,94 @@ AD85020B_StatusTypeDef AD85020B_RamRead24(uint8_t ram_addr, uint8_t bank, uint32
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return AD85020B_OK;
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return AD85020B_OK;
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}
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}
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/* 样机《音频DSP配置汇总》:每段 5 个 Q3.21 系数,地址顺序 A1 A2 B1 B2 A0。
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分母为 1 - B1·z^-1 - B2·z^-2。直通段也写入,避免软复位后 RAM 仍残留旧值。 */
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typedef struct
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{
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uint8_t bank;
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uint8_t base;
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uint32_t a1;
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uint32_t a2;
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uint32_t b1;
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uint32_t b2;
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uint32_t a0;
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} AD85020B_EqBand;
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static const AD85020B_EqBand s_proto_eq[] =
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{
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/* CH1 bank0:EQ1–EQ5 为样机非直通,EQ6–EQ18 直通 */
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{0, 0x00, 0xC25937, 0x1ED364, 0x3D9BF6, 0xE24E65, 0x1ED364},
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{0, 0x05, 0xC2FCBC, 0x1D24C7, 0x3D0344, 0xE2DB39, 0x200000},
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{0, 0x0A, 0xCFC351, 0x137DEF, 0x303CAF, 0xEBC9F2, 0x20B81F},
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{0, 0x0F, 0xC454DD, 0x1DD591, 0x3B8646, 0xE43000, 0x1DD591},
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{0, 0x14, 0xDF8842, 0x0B92EF, 0x2077BE, 0xF215B2, 0x22575F},
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{0, 0x19, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x1E, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x23, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x28, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x2D, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x32, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x37, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x3C, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x41, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0x46, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0xA0, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0xA5, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{0, 0xAA, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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/* CH2 bank1:EQ1–EQ7 为样机非直通,EQ8–EQ18 直通 */
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{1, 0x00, 0x00F723, 0x007B91, 0x36BC77, 0xE75542, 0x007B91},
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{1, 0x05, 0xC0243C, 0x1FD490, 0x3FDBC4, 0xE02403, 0x20076D},
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{1, 0x0A, 0xC016F7, 0x1FF484, 0x3FE905, 0xE016F3, 0x1FF484},
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{1, 0x0F, 0xC21CAD, 0x1DF911, 0x3DE353, 0xE206EF, 0x200000},
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{1, 0x14, 0xC04043, 0x1FC9CB, 0x3FBFBD, 0xE03F7A, 0x1FF6BB},
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{1, 0x19, 0xC0E5B4, 0x1F1D69, 0x3F1A4C, 0xE0E297, 0x200000},
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{1, 0x1E, 0x00EB92, 0x0075C9, 0x342C97, 0xE9FC45, 0x0075C9},
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{1, 0x23, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0x28, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0x2D, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0x32, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0x37, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0x3C, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0x41, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0x46, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0xA0, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0xA5, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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{1, 0xAA, 0x000000, 0x000000, 0x000000, 0x000000, 0x200000},
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};
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static AD85020B_StatusTypeDef AD85020B_ApplyPrototypeEq(void)
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{
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uint16_t i;
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uint8_t k;
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AD85020B_StatusTypeDef status;
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status = AD85020B_I2C_Write(AD85020B_REG_SCTL4, AD85020B_SCTL4_PROTO_EQ);
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if (status != AD85020B_OK)
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return status;
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for (i = 0; i < (uint16_t)(sizeof(s_proto_eq) / sizeof(s_proto_eq[0])); i++)
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{
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const uint32_t coef[5] =
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{
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s_proto_eq[i].a1,
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s_proto_eq[i].a2,
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s_proto_eq[i].b1,
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s_proto_eq[i].b2,
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s_proto_eq[i].a0
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};
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for (k = 0; k < 5U; k++)
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{
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status = AD85020B_RamWrite24((uint8_t)(s_proto_eq[i].base + k),
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s_proto_eq[i].bank,
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coef[k]);
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if (status != AD85020B_OK)
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return status;
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}
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}
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return AD85020B_OK;
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}
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/**
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/**
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* @brief AD85020B 初始化
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* @brief AD85020B 初始化
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* @retval AD85020B_StatusTypeDef: 初始化结果
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* @retval AD85020B_StatusTypeDef: 初始化结果
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@ -372,6 +460,10 @@ AD85020B_StatusTypeDef AD85020B_Init(void)
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/* 样机 EQ:在解除静音前写入,避免先播出直通声音 */
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status = AD85020B_ApplyPrototypeEq();
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if (status != AD85020B_OK) return status;
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/* 步骤6:解除静音(文档SCTL3,MMUTE=0,0x00) */
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/* 步骤6:解除静音(文档SCTL3,MMUTE=0,0x00) */
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status = AD85020B_I2C_Write(AD85020B_REG_SCTL3, 0x00);
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status = AD85020B_I2C_Write(AD85020B_REG_SCTL3, 0x00);
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if (status != AD85020B_OK) return status;
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if (status != AD85020B_OK) return status;
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@ -38,10 +38,13 @@
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#define AD85020B_REG_SCTL2 0x01 // 采样率配置
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#define AD85020B_REG_SCTL2 0x01 // 采样率配置
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#define AD85020B_REG_SCTL3 0x02 // 静音控制
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#define AD85020B_REG_SCTL3 0x02 // 静音控制
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#define AD85020B_REG_MVOL 0x03 // 主音量控制
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#define AD85020B_REG_MVOL 0x03 // 主音量控制
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#define AD85020B_REG_SCTL4 0x0C /* EQ / DEQ / 音调;样机 0x90:EQ 开、左右独立 */
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#define AD85020B_SCTL4_PROTO_EQ 0x90
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#define AD85020B_REG_HEADPHONEVOL 0x87 // 耳机音量控制
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#define AD85020B_REG_HEADPHONEVOL 0x87 // 耳机音量控制
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/* 系数 RAM 间接访问(手册 0x1D~0x2D) */
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/* 系数 RAM 间接访问(手册 0x1D~0x2D)
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#define AD85020B_REG_CFA 0x1D /* CFA[6:0] RAM 基址 */
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寄存器表 CFA 为 8 位;RAM 图地址到 0xB0。按样机抓包把完整地址写入 0x1D。 */
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#define AD85020B_REG_CFA 0x1D /* CFA[7:0] RAM 基址 */
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#define AD85020B_REG_A1_T 0x1E /* 系数 top [23:16] */
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#define AD85020B_REG_A1_T 0x1E /* 系数 top [23:16] */
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#define AD85020B_REG_A1_M 0x1F /* 系数 middle [15:8] */
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#define AD85020B_REG_A1_M 0x1F /* 系数 middle [15:8] */
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#define AD85020B_REG_A1_B 0x20 /* 系数 bottom [7:0] */
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#define AD85020B_REG_A1_B 0x20 /* 系数 bottom [7:0] */
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