2020-09-16 06:30:17 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Interface for managing mitigations for Spectre vulnerabilities.
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*
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* Copyright (C) 2020 Google LLC
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* Author: Will Deacon <will@kernel.org>
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*/
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#ifndef __ASM_SPECTRE_H
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#define __ASM_SPECTRE_H
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#include <asm/cpufeature.h>
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/* Watch out, ordering is important here. */
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enum mitigation_state {
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SPECTRE_UNAFFECTED,
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SPECTRE_MITIGATED,
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SPECTRE_VULNERABLE,
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};
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struct task_struct;
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enum mitigation_state arm64_get_spectre_v2_state(void);
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bool has_spectre_v2(const struct arm64_cpu_capabilities *cap, int scope);
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void spectre_v2_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
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2020-09-18 18:54:33 +08:00
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enum mitigation_state arm64_get_spectre_v4_state(void);
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bool has_spectre_v4(const struct arm64_cpu_capabilities *cap, int scope);
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void spectre_v4_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
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void spectre_v4_enable_task_mitigation(struct task_struct *tsk);
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2022-02-09 00:08:13 +08:00
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enum mitigation_state arm64_get_spectre_bhb_state(void);
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arm64: Mitigate spectre style branch history side channels
commit 558c303c9734af5a813739cd284879227f7297d2 upstream.
Speculation attacks against some high-performance processors can
make use of branch history to influence future speculation.
When taking an exception from user-space, a sequence of branches
or a firmware call overwrites or invalidates the branch history.
The sequence of branches is added to the vectors, and should appear
before the first indirect branch. For systems using KPTI the sequence
is added to the kpti trampoline where it has a free register as the exit
from the trampoline is via a 'ret'. For systems not using KPTI, the same
register tricks are used to free up a register in the vectors.
For the firmware call, arch-workaround-3 clobbers 4 registers, so
there is no choice but to save them to the EL1 stack. This only happens
for entry from EL0, so if we take an exception due to the stack access,
it will not become re-entrant.
For KVM, the existing branch-predictor-hardening vectors are used.
When a spectre version of these vectors is in use, the firmware call
is sufficient to mitigate against Spectre-BHB. For the non-spectre
versions, the sequence of branches is added to the indirect vector.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
[ modified for stable, removed bitmap of mitigations, use kvm template
infrastructure ]
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-11-10 22:48:00 +08:00
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bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry, int scope);
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u8 spectre_bhb_loop_affected(int scope);
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void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
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2020-09-16 06:30:17 +08:00
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#endif /* __ASM_SPECTRE_H */
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