From 2f2ba4a8f8da7b54072abacf24d4695db358e518 Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Tue, 16 Aug 2022 14:59:14 +0800 Subject: [PATCH] phy: rockchip-samsung-hdptx-hdmi: Don't set bus_width 8 when probe Fix set pll rate err when play hdr video first time after system boot. Signed-off-by: Algea Cao Change-Id: Ic85b8f8b20a2a588627f650ff402076decd23b63 --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c index e10776a28864..15f361facdf3 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c @@ -2313,7 +2313,6 @@ static int rockchip_hdptx_phy_probe(struct platform_device *pdev) } phy_set_drvdata(hdptx->phy, hdptx); - phy_set_bus_width(hdptx->phy, 8); pm_runtime_enable(dev); ret = devm_add_action_or_reset(dev, rockchip_hdptx_phy_runtime_disable,