From 88fae346ea776d5b0d336642b5274be0501cc911 Mon Sep 17 00:00:00 2001 From: OrangePi CM5 Builder Date: Tue, 12 May 2026 20:00:50 +0800 Subject: [PATCH] patch: orangepicm5 gmac1 RMII (YT8522C) --- ...-orangepi-cm5-gmac1-RMII-for-YT8522C.patch | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 external/patch/kernel/rockchip-rk3588-legacy/board_orangepicm5/0001-rk3588s-orangepi-cm5-gmac1-RMII-for-YT8522C.patch diff --git a/external/patch/kernel/rockchip-rk3588-legacy/board_orangepicm5/0001-rk3588s-orangepi-cm5-gmac1-RMII-for-YT8522C.patch b/external/patch/kernel/rockchip-rk3588-legacy/board_orangepicm5/0001-rk3588s-orangepi-cm5-gmac1-RMII-for-YT8522C.patch new file mode 100644 index 000000000000..1a5b12557527 --- /dev/null +++ b/external/patch/kernel/rockchip-rk3588-legacy/board_orangepicm5/0001-rk3588s-orangepi-cm5-gmac1-RMII-for-YT8522C.patch @@ -0,0 +1,52 @@ +From ede9ed9d5582f744ed108c544316b90f7db678b3 Mon Sep 17 00:00:00 2001 +From: yuquanjun +Date: Tue, 12 May 2026 18:44:11 +0800 +Subject: [PATCH] rk3588s: orangepi-cm5: gmac1 RMII for YT8522C + +--- + .../boot/dts/rockchip/rk3588s-orangepi-cm5.dts | 14 ++++---------- + 1 file changed, 4 insertions(+), 10 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dts +index b9e4af46e..79c14ad02 100755 +--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dts +@@ -123,31 +123,25 @@ ext_cam_ov5647_clk: external-camera-ov5647-clock { + }; + + &gmac1 { +- /* Use rgmii-rxid mode to disable rx delay inside Soc */ +- phy-mode = "rgmii-rxid"; ++ phy-mode = "rmii"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; + snps,reset-active-low; +- /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 +- &gmac1_rgmii_clk +- &gmac1_rgmii_bus>; ++ &gmac1_clkinout>; + +- tx_delay = <0x42>; +- /* rx_delay = <0x3f>; */ +- +- phy-handle = <&rgmii_phy1>; ++ phy-handle = <&rmii_phy1>; + status = "okay"; + }; + + &mdio1 { +- rgmii_phy1: phy@1 { ++ rmii_phy1: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; +-- +2.34.1 +