arm64: dts: rockchip: add RK3528 evaluation board devicetree
Add some board files for RK3528 SoCs: rk3528-evb1-ddr4-v10.dts is for android platform, rk3528-evb1-ddr4-v10-linux.dts is for linux platform. add evb2/evb3/evb4. evb1: gmac0 + 100M Embed PHY, gmac1 + 1000M RGMII PHY evb2: gmac0 + 100M Embed PHY evb3: gmac0 + 100M Embed PHY evb4: gmac0 + 100M Embed PHY, gmac1 + 1000M RGMII PHY The evb1 & evb2 & evb4's pa-ctl-gpios are same. But the evb3 is different. Signed-off-by: Sandy Huang <hjc@rock-chips.com> Signed-off-by: Lin Qihao <kevin.lin@rock-chips.com> Signed-off-by: shengfei Xu <xsf@rock-chips.com> Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com> Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Ding Wei <leo.ding@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Zhen Chen <chenzhen@rock-chips.com> Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Huang zhibao <hzb@rock-chips.com> Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com> Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Tao Huang <huangtao@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Simon Xue <xxm@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com> Signed-off-by: Shaohan Yao <shaohan.yao@rock-chips.com> Signed-off-by: Herman Chen <herman.chen@rock-chips.com> Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com> Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: Id08f7e353159cfd38e3fab7912771db792f4b1ba
This commit is contained in:
Sandy Huang
parent
54abe82fdc
commit
8a6ca5d2c7
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@ -67,6 +67,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb1-ddr4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb1-ddr4-v10-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb2-ddr3-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb3-lp4x-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb4-ddr4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-iotest-lp3-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-box-demo-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb-mipitest-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb1-ddr4-v10.dtb
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@ -0,0 +1,99 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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*/
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/ {
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chosen: chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff9f0000 console=ttyFIQ0 driver_async_probe=dwmmc_rockchip,rk_gmac-dwmac,rockchip-drm drm_kms_helper.fbdev_emulation=0";
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <0>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0m0_xfer>;
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status = "okay";
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x0 0x00800000>;
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linux,cma-default;
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};
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drm_logo: drm-logo@00000000 {
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compatible = "rockchip,drm-logo";
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reg = <0x0 0x0 0x0 0x0>;
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};
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drm_cubic_lut: drm-cubic-lut@00000000 {
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compatible = "rockchip,drm-cubic-lut";
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reg = <0x0 0x0 0x0 0x0>;
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};
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ramoops: ramoops@110000 {
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compatible = "ramoops";
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/* 0x110000 to 0x1f0000 is for ramoops */
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reg = <0x0 0x110000 0x0 0xe0000>;
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boot-log-size = <0x8000>; /* do not change */
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boot-log-count = <0x1>; /* do not change */
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console-size = <0x80000>;
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pmsg-size = <0x30000>;
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ftrace-size = <0x00000>;
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record-size = <0x14000>;
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};
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};
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};
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&display_subsystem {
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memory-region = <&drm_logo>, <&drm_cubic_lut>;
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memory-region-names = "drm-logo", "drm-cubic-lut";
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/* devfreq = <&dmc>; */
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route {
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route_hdmi: route-hdmi {
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status = "okay";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vp0_out_hdmi>;
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};
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route_tve: route-tve {
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status = "okay";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vp1_out_tve>;
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};
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};
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};
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&rng {
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status = "okay";
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};
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&vop {
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support-multi-area;
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};
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@ -0,0 +1,591 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "rk3528.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/rk-input.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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/ {
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acodec_sound: acodec-sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,name = "rk3528-acodec";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&sai2>;
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};
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simple-audio-card,codec {
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sound-dai = <&acodec>;
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};
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};
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adc_keys: adc-keys {
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status = "okay";
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compatible = "adc-keys";
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io-channels = <&saradc 1>;
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io-channel-names = "buttons";
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keyup-threshold-microvolt = <1800000>;
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poll-interval = <100>;
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vol-up-key {
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label = "volume up";
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linux,code = <KEY_VOLUMEUP>;
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press-threshold-microvolt = <1750>;
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};
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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hdmi_sound: hdmi-sound {
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compatible = "rockchip,hdmi";
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rockchip,mclk-fs = <128>;
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rockchip,card-name = "rockchip,hdmi";
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rockchip,cpu = <&sai3>;
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rockchip,codec = <&hdmi>;
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};
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pdmics: dummy-codec {
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status = "disabled";
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compatible = "rockchip,dummy-codec";
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#sound-dai-cells = <0>;
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};
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pdm_mic_array: pdm-mic-array {
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status = "disabled";
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compatible = "simple-audio-card";
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simple-audio-card,name = "rockchip,pdm-mic-array";
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simple-audio-card,cpu {
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sound-dai = <&pdm>;
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};
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simple-audio-card,codec {
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sound-dai = <&pdmics>;
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};
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};
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spdif-sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,name = "ROCKCHIP,SPDIF";
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simple-audio-card,cpu {
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sound-dai = <&spdif_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&spdif_out>;
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};
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};
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spdif_out: spdif-out {
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status = "okay";
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compatible = "linux,spdif-dit";
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#sound-dai-cells = <0>;
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};
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vcc5v0_sys: vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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};
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_otg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_otg_en>;
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};
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/omit-if-no-ref/
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vccio_sd: vccio-sd {
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compatible = "regulator-gpio";
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regulator-name = "vccio_sd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sys>;
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states = <1800000 0x0
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3300000 0x1>;
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};
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vdd_logic: vdd-logic {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 5000 1>;
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regulator-name = "vdd_logic";
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regulator-min-microvolt = <705000>;
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regulator-max-microvolt = <1006000>;
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regulator-init-microvolt = <900000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc5v0_sys>;
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status = "okay";
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};
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vdd_cpu: vdd-cpu {
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compatible = "pwm-regulator";
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pwms = <&pwm1 0 5000 1>;
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <746000>;
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regulator-max-microvolt = <1201000>;
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regulator-init-microvolt = <953000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc5v0_sys>;
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status = "okay";
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};
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vdd_gpu: vdd-gpu {
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compatible = "pwm-regulator";
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pwms = <&pwm0 0 5000 1>;
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regulator-name = "vdd_gpu";
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regulator-min-microvolt = <705000>;
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regulator-max-microvolt = <1148000>;
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regulator-init-microvolt = <900000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc5v0_sys>;
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status = "okay";
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};
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vdd_0v9_s3: vdd-0v9-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vdd_0v9_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vdd_1v8_s3: vdd-1v8-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vdd_1v8_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc_3v3_s3: vcc-3v3-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc5v0_sys>;
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};
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/omit-if-no-ref/
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vcc_sd: vcc-sd {
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compatible = "regulator-fixed";
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gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
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regulator-name = "vcc_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3_s3>;
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};
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vcc_ddr_s3: vcc-ddr-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_ddr_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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vin-supply = <&vcc5v0_sys>;
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};
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};
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&acodec {
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pa-ctl-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&avsd {
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status = "okay";
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};
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&combphy_pu {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&crypto {
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status = "okay";
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};
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&display_subsystem {
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status = "okay";
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};
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&gmac0 {
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status = "okay";
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&hdmi {
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status = "okay";
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};
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&hdmi_in_vp0 {
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status = "okay";
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};
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&hdmiphy {
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status = "okay";
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};
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&iep {
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status = "okay";
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};
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&iep_mmu {
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status = "okay";
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};
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&jpegd {
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status = "okay";
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};
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&jpegd_mmu {
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status = "okay";
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};
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&mpp_srv {
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status = "okay";
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};
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&pinctrl {
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usb {
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vcc5v0_host_en: vcc5v0-host-en {
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rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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vcc5v0_otg_en: vcc5v0-otg-en {
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rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
compatible = "rockchip,remotectl-pwm";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm3m0_pins>;
|
||||
remote_pwm_id = <3>;
|
||||
handle_cpu_id = <1>;
|
||||
remote_support_psci = <0>;
|
||||
status = "okay";
|
||||
|
||||
ir_key1 {
|
||||
rockchip,usercode = <0x4040>;
|
||||
rockchip,key_table =
|
||||
<0xf2 KEY_REPLY>,
|
||||
<0xba KEY_BACK>,
|
||||
<0xf4 KEY_UP>,
|
||||
<0xf1 KEY_DOWN>,
|
||||
<0xef KEY_LEFT>,
|
||||
<0xee KEY_RIGHT>,
|
||||
<0xbd KEY_HOME>,
|
||||
<0xea KEY_VOLUMEUP>,
|
||||
<0xe3 KEY_VOLUMEDOWN>,
|
||||
<0xe2 KEY_SEARCH>,
|
||||
<0xb2 KEY_POWER>,
|
||||
<0xbc KEY_MUTE>,
|
||||
<0xec KEY_MENU>,
|
||||
<0xbf 0x190>,
|
||||
<0xe0 0x191>,
|
||||
<0xe1 0x192>,
|
||||
<0xe9 183>,
|
||||
<0xe6 248>,
|
||||
<0xe8 185>,
|
||||
<0xe7 186>,
|
||||
<0xf0 388>,
|
||||
<0xbe 0x175>;
|
||||
};
|
||||
|
||||
ir_key2 {
|
||||
rockchip,usercode = <0xff00>;
|
||||
rockchip,key_table =
|
||||
<0xf9 KEY_HOME>,
|
||||
<0xbf KEY_BACK>,
|
||||
<0xfb KEY_MENU>,
|
||||
<0xaa KEY_REPLY>,
|
||||
<0xb9 KEY_UP>,
|
||||
<0xe9 KEY_DOWN>,
|
||||
<0xb8 KEY_LEFT>,
|
||||
<0xea KEY_RIGHT>,
|
||||
<0xeb KEY_VOLUMEDOWN>,
|
||||
<0xef KEY_VOLUMEUP>,
|
||||
<0xf7 KEY_MUTE>,
|
||||
<0xe7 KEY_POWER>,
|
||||
<0xfc KEY_POWER>,
|
||||
<0xa9 KEY_VOLUMEDOWN>,
|
||||
<0xa8 KEY_PLAYPAUSE>,
|
||||
<0xe0 KEY_VOLUMEDOWN>,
|
||||
<0xa5 KEY_VOLUMEDOWN>,
|
||||
<0xab 183>,
|
||||
<0xb7 388>,
|
||||
<0xe8 388>,
|
||||
<0xf8 184>,
|
||||
<0xaf 185>,
|
||||
<0xed KEY_VOLUMEDOWN>,
|
||||
<0xee 186>,
|
||||
<0xb3 KEY_VOLUMEDOWN>,
|
||||
<0xf1 KEY_VOLUMEDOWN>,
|
||||
<0xf2 KEY_VOLUMEDOWN>,
|
||||
<0xf3 KEY_SEARCH>,
|
||||
<0xb4 KEY_VOLUMEDOWN>,
|
||||
<0xa4 KEY_SETUP>,
|
||||
<0xbe KEY_SEARCH>;
|
||||
};
|
||||
|
||||
ir_key3 {
|
||||
rockchip,usercode = <0x1dcc>;
|
||||
rockchip,key_table =
|
||||
<0xee KEY_REPLY>,
|
||||
<0xf0 KEY_BACK>,
|
||||
<0xf8 KEY_UP>,
|
||||
<0xbb KEY_DOWN>,
|
||||
<0xef KEY_LEFT>,
|
||||
<0xed KEY_RIGHT>,
|
||||
<0xfc KEY_HOME>,
|
||||
<0xf1 KEY_VOLUMEUP>,
|
||||
<0xfd KEY_VOLUMEDOWN>,
|
||||
<0xb7 KEY_SEARCH>,
|
||||
<0xff KEY_POWER>,
|
||||
<0xf3 KEY_MUTE>,
|
||||
<0xbf KEY_MENU>,
|
||||
<0xf9 0x191>,
|
||||
<0xf5 0x192>,
|
||||
<0xb3 388>,
|
||||
<0xbe KEY_1>,
|
||||
<0xba KEY_2>,
|
||||
<0xb2 KEY_3>,
|
||||
<0xbd KEY_4>,
|
||||
<0xf9 KEY_5>,
|
||||
<0xb1 KEY_6>,
|
||||
<0xfc KEY_7>,
|
||||
<0xf8 KEY_8>,
|
||||
<0xb0 KEY_9>,
|
||||
<0xb6 KEY_0>,
|
||||
<0xb5 KEY_BACKSPACE>;
|
||||
};
|
||||
};
|
||||
|
||||
&rga2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rga2_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvdec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvdec_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvenc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvenc_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rockchip_suspend {
|
||||
status = "okay";
|
||||
rockchip,sleep-debug-en = <1>;
|
||||
rockchip,virtual-poweroff = <1>;
|
||||
rockchip,sleep-mode-config = <
|
||||
(0
|
||||
| RKPM_SLP_ARMPD
|
||||
)
|
||||
>;
|
||||
rockchip,wakeup-config = <
|
||||
(0
|
||||
| RKPM_CPU0_WKUP_EN
|
||||
| RKPM_GPIO_WKUP_EN
|
||||
)
|
||||
>;
|
||||
rockchip,pwm-regulator-config = <
|
||||
(0
|
||||
| RKPM_PWM0_M0_REGULATOR_EN
|
||||
| RKPM_PWM1_M0_REGULATOR_EN
|
||||
)
|
||||
>;
|
||||
};
|
||||
|
||||
&sai2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sai3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vdd_1v8_s3>;
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
non-removable;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
max-frequency = <200000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
max-frequency = <150000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
supports-sd;
|
||||
sd-uhs-sdr12;
|
||||
sd-uhs-sdr25;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr104;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
vmmc-supply = <&vcc_sd>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sfc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spdif_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tve {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tve_in_vp1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_host {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
vbus-supply = <&vcc5v0_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd30 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
dr_mode = "otg";
|
||||
extcon = <&usb2phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vdpp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vdpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vdpu_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3528-evb1-ddr4-v10.dtsi"
|
||||
#include "rk3528-linux.dtsi"
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3528-evb1-ddr4-v10.dtsi"
|
||||
#include "rk3528-android.dtsi"
|
||||
|
||||
/{
|
||||
firmware {
|
||||
android {
|
||||
compatible = "android,firmware";
|
||||
boot_devices = "ffbf0000.mmc";
|
||||
vbmeta {
|
||||
compatible = "android,vbmeta";
|
||||
parts = "vbmeta,boot,system,vendor,dtbo";
|
||||
};
|
||||
fstab {
|
||||
compatible = "android,fstab";
|
||||
vendor {
|
||||
compatible = "android,vendor";
|
||||
dev = "/dev/block/by-name/vendor";
|
||||
type = "ext4";
|
||||
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
|
||||
fsmgr_flags = "wait,avb";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3528.dtsi"
|
||||
#include "rk3528-evb.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3528 EVB1 DDR4 V10 Board";
|
||||
compatible = "rockchip,rk3528-evb1-ddr4-v10", "rockchip,rk3528";
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_enable_h &clkm1_32k_out>;
|
||||
reset-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wireless_bluetooth: wireless-bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
//wifi-bt-power-toggle;
|
||||
uart_rts_gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart2m1_rtsn>;
|
||||
pinctrl-1 = <&uart2m1_gpios>;
|
||||
BT,reset_gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
wireless_wlan: wireless-wlan {
|
||||
compatible = "wlan-platdata";
|
||||
rockchip,grf = <&grf>;
|
||||
wifi_chip_type = "ap6275s";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_host_wake_irq>;
|
||||
WIFI,host_wake_irq = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
/* Use rgmii-rxid mode to disable rx delay inside Soc */
|
||||
phy-mode = "rgmii-rxid";
|
||||
clock_in_out = "output";
|
||||
|
||||
snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
/* Reset time is 20ms, 100ms for rtl8211f */
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
|
||||
tx_delay = <0x30>;
|
||||
/* rx_delay = <0x3f>; */
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii_miim
|
||||
&rgmii_tx_bus2
|
||||
&rgmii_rx_bus2
|
||||
&rgmii_rgmii_clk
|
||||
&rgmii_rgmii_bus>;
|
||||
|
||||
phy-handle = <&rgmii_phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
rgmii_phy: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdio0 {
|
||||
max-frequency = <200000000>;
|
||||
no-sd;
|
||||
no-mmc;
|
||||
supports-sdio;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2m1_xfer &uart2m1_ctsn>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
wifi_32k: wifi-32k {
|
||||
rockchip,pins = <1 RK_PC3 1 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
uart2m1_gpios: uart2m1-gpios {
|
||||
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3528-evb2-ddr3-v10.dtsi"
|
||||
#include "rk3528-android.dtsi"
|
||||
|
||||
/{
|
||||
firmware {
|
||||
android {
|
||||
compatible = "android,firmware";
|
||||
boot_devices = "ffbf0000.mmc";
|
||||
vbmeta {
|
||||
compatible = "android,vbmeta";
|
||||
parts = "vbmeta,boot,system,vendor,dtbo";
|
||||
};
|
||||
fstab {
|
||||
compatible = "android,fstab";
|
||||
vendor {
|
||||
compatible = "android,vendor";
|
||||
dev = "/dev/block/by-name/vendor";
|
||||
type = "ext4";
|
||||
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
|
||||
fsmgr_flags = "wait,avb";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,138 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3528.dtsi"
|
||||
#include "rk3528-evb.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3528 EVB2 DDR3 V10 Board";
|
||||
compatible = "rockchip,rk3528-evb2-ddr3-v10", "rockchip,rk3528";
|
||||
|
||||
pcie20_usb30_avdd0v9: pcie20-usb30-avdd0v9 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pcie20_usb30-avdd0v9";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
vin-supply = <&vdd_0v9_s3>;
|
||||
};
|
||||
|
||||
pcie20_usb30_avdd1v8: pcie20-usb30-avdd1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pcie20_usb30_avdd1v8";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vdd_1v8_s3>;
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_enable_h &clkm1_32k_out>;
|
||||
reset-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
vcc3v3_pcie20: vcc3v3-pcie20 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_pcie20";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <5000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
wireless_bluetooth: wireless-bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
//wifi-bt-power-toggle;
|
||||
uart_rts_gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart2m1_rtsn>;
|
||||
pinctrl-1 = <&uart2m1_gpios>;
|
||||
BT,reset_gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
wireless_wlan: wireless-wlan {
|
||||
compatible = "wlan-platdata";
|
||||
rockchip,grf = <&grf>;
|
||||
wifi_chip_type = "ap6275s";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_host_wake_irq>;
|
||||
WIFI,host_wake_irq = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie20>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdio0 {
|
||||
max-frequency = <200000000>;
|
||||
no-sd;
|
||||
no-mmc;
|
||||
supports-sdio;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2m1_xfer &uart2m1_ctsn>;
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
phys = <&u2phy_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
maximum-speed = "high-speed";
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,usb2-lpm-disable;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
wifi_32k: wifi-32k {
|
||||
rockchip,pins = <1 RK_PC3 1 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
uart2m1_gpios: uart2m1-gpios {
|
||||
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3528-evb3-lp4x-v10.dtsi"
|
||||
#include "rk3528-android.dtsi"
|
||||
|
||||
/{
|
||||
firmware {
|
||||
android {
|
||||
compatible = "android,firmware";
|
||||
boot_devices = "ffbf0000.mmc";
|
||||
vbmeta {
|
||||
compatible = "android,vbmeta";
|
||||
parts = "vbmeta,boot,system,vendor,dtbo";
|
||||
};
|
||||
fstab {
|
||||
compatible = "android,fstab";
|
||||
vendor {
|
||||
compatible = "android,vendor";
|
||||
dev = "/dev/block/by-name/vendor";
|
||||
type = "ext4";
|
||||
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
|
||||
fsmgr_flags = "wait,avb";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pdm {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pdm_clk1
|
||||
&pdm_sdi0
|
||||
&pdm_sdi2>;
|
||||
};
|
||||
|
||||
&pdmics {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pdm_mic_array {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,127 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3528.dtsi"
|
||||
#include "rk3528-evb.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3528 EVB3 LP4X V10 Board";
|
||||
compatible = "rockchip,rk3528-evb3-lp4x-v10", "rockchip,rk3528";
|
||||
|
||||
vcc5v0_sys_s0: vcc5v0-sys-s0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys_s0";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
vcc_1v8_s0: vcc-1v8-s0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8_s0";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc5v0_sys_s0>;
|
||||
};
|
||||
|
||||
vcc_3v3_s0: vcc-3v3-s0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc5v0_sys_s0>;
|
||||
};
|
||||
|
||||
vdd_0v9_s0: vdd-0v9-s0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_0v9_s0";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
vin-supply = <&vcc5v0_sys_s0>;
|
||||
};
|
||||
|
||||
wireless_bluetooth: wireless-bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
uart_rts_gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart2m0_rtsn>;
|
||||
pinctrl-1 = <&uart2m0_gpios>;
|
||||
BT,reset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
wireless_wlan: wireless-wlan {
|
||||
compatible = "wlan-platdata";
|
||||
rockchip,grf = <&grf>;
|
||||
wifi_chip_type = "ap6275p";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_enable &wifi_host_wake_irq &clkm0_32k_out>;
|
||||
WIFI,reset_gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
WIFI,host_wake_irq = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_perst>;
|
||||
rockchip,skip-scan-in-resume;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2m0_xfer &uart2m0_ctsn>;
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
phys = <&u2phy_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
maximum-speed = "high-speed";
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,usb2-lpm-disable;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
wireless-wlan {
|
||||
wifi_perst: wifi-perst {
|
||||
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
wifi_enable: wifi-enable {
|
||||
rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_output_high>;
|
||||
};
|
||||
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
uart2m0_gpios: uart2m0-gpios {
|
||||
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&acodec {
|
||||
pa-ctl-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3528-evb1-ddr4-v10.dtsi"
|
||||
#include "rk3528-android.dtsi"
|
||||
|
||||
/{
|
||||
firmware {
|
||||
android {
|
||||
compatible = "android,firmware";
|
||||
boot_devices = "ffbf0000.mmc";
|
||||
vbmeta {
|
||||
compatible = "android,vbmeta";
|
||||
parts = "vbmeta,boot,system,vendor,dtbo";
|
||||
};
|
||||
fstab {
|
||||
compatible = "android,fstab";
|
||||
vendor {
|
||||
compatible = "android,vendor";
|
||||
dev = "/dev/block/by-name/vendor";
|
||||
type = "ext4";
|
||||
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
|
||||
fsmgr_flags = "wait,avb";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3528.dtsi"
|
||||
#include "rk3528-android.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3528 IOTEST LP3 V10 Board";
|
||||
compatible = "rockchip,rk3528-iotest-lp3-v10", "rockchip,rk3528";
|
||||
|
||||
firmware {
|
||||
android {
|
||||
compatible = "android,firmware";
|
||||
boot_devices = "ffbf0000.mmc";
|
||||
vbmeta {
|
||||
compatible = "android,vbmeta";
|
||||
parts = "vbmeta,boot,system,vendor,dtbo";
|
||||
};
|
||||
fstab {
|
||||
compatible = "android,fstab";
|
||||
vendor {
|
||||
compatible = "android,vendor";
|
||||
dev = "/dev/block/by-name/vendor";
|
||||
type = "ext4";
|
||||
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
|
||||
fsmgr_flags = "wait,avb";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/ {
|
||||
chosen: chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xff9f0000 console=ttyFIQ0";
|
||||
};
|
||||
|
||||
fiq-debugger {
|
||||
compatible = "rockchip,fiq-debugger";
|
||||
rockchip,serial-id = <0>;
|
||||
rockchip,wake-irq = <0>;
|
||||
/* If enable uart uses irq instead of fiq */
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
|
||||
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0m0_xfer>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reserved_memory: reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
drm_logo: drm-logo@00000000 {
|
||||
compatible = "rockchip,drm-logo";
|
||||
reg = <0x0 0x0 0x0 0x0>;
|
||||
};
|
||||
|
||||
drm_cubic_lut: drm-cubic-lut@00000000 {
|
||||
compatible = "rockchip,drm-cubic-lut";
|
||||
reg = <0x0 0x0 0x0 0x0>;
|
||||
};
|
||||
|
||||
ramoops: ramoops@110000 {
|
||||
compatible = "ramoops";
|
||||
/* 0x110000 to 0x1f0000 is for ramoops */
|
||||
reg = <0x0 0x110000 0x0 0xe0000>;
|
||||
boot-log-size = <0x8000>; /* do not change */
|
||||
boot-log-count = <0x1>; /* do not change */
|
||||
console-size = <0x80000>;
|
||||
pmsg-size = <0x30000>;
|
||||
ftrace-size = <0x00000>;
|
||||
record-size = <0x14000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&display_subsystem {
|
||||
memory-region = <&drm_logo>, <&drm_cubic_lut>;
|
||||
memory-region-names = "drm-logo", "drm-cubic-lut";
|
||||
/* devfreq = <&dmc>; */
|
||||
|
||||
route {
|
||||
route_hdmi: route-hdmi {
|
||||
status = "disabled";
|
||||
logo,uboot = "logo.bmp";
|
||||
logo,kernel = "logo_kernel.bmp";
|
||||
logo,mode = "center";
|
||||
charge_logo,mode = "center";
|
||||
connect = <&vp0_out_hdmi>;
|
||||
};
|
||||
route_tve: route-tve {
|
||||
status = "disabled";
|
||||
logo,uboot = "logo.bmp";
|
||||
logo,kernel = "logo_kernel.bmp";
|
||||
logo,mode = "center";
|
||||
charge_logo,mode = "center";
|
||||
connect = <&vp1_out_tve>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rng {
|
||||
status = "okay";
|
||||
};
|
||||
Loading…
Reference in New Issue