From 94bb56ba773ae98d798adf620b1401d5986e3b85 Mon Sep 17 00:00:00 2001
From: orangepi-xunlong <258384131@qq.com>
Date: Thu, 15 Jun 2023 20:17:24 +0800
Subject: [PATCH] opi5plus: Support gc5035 camera

---
 arch/arm64/boot/dts/rockchip/overlay/Makefile |  1 +
 .../overlay/rk3588-opi5plus-gc5035.dts        | 96 +++++++++++++++++++
 .../rk3588-orangepi-5-plus-camera1.dtsi       | 31 ++++++
 3 files changed, 128 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3588-opi5plus-gc5035.dts

diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
index fd556c74afbd..131a70c3a0d6 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
@@ -50,6 +50,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3588-ov13855-c1.dtbo \
 	rk3588-ov13855-c2.dtbo \
 	rk3588-ov13855-c3.dtbo \
+	rk3588-opi5plus-gc5035.dtbo \
 	rk3588-opi5plus-ov13850.dtbo \
 	rk3588-opi5plus-ov13855.dtbo \
 	rk3588-dmc.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3588-opi5plus-gc5035.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3588-opi5plus-gc5035.dts
new file mode 100644
index 000000000000..73500cff3449
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3588-opi5plus-gc5035.dts
@@ -0,0 +1,96 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&csi2_dphy0_hw>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@1 {
+		target = <&csi2_dphy0>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@2 {
+		target = <&mipi2_csi2>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@3 {
+		target = <&rkcif_mipi_lvds2>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@4 {
+		target = <&rkcif_mipi_lvds2_sditf>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@5 {
+		target = <&rkisp0_vir1>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@6 {
+		target = <&i2c3>;
+
+		__overlay__ {
+			status = "okay";
+
+			gc5035@37 {
+				status = "okay";
+			};
+		};
+	};
+
+	fragment@7 {
+		target = <&rkcif>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@8 {
+		target = <&rkcif_mmu>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@9 {
+		target = <&rkisp0>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@10 {
+		target = <&isp0_mmu>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus-camera1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus-camera1.dtsi
index ae6b096418ff..62d50b7a06f9 100755
--- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus-camera1.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus-camera1.dtsi
@@ -29,6 +29,12 @@
 				remote-endpoint = <&ov13855_out2>;
 				data-lanes = <1 2>;
 			};
+
+			mipi_in_ucam2: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&gc5035_out>;
+				data-lanes = <1 2>;
+			};
 		};
 		port@1 {
 		        reg = <1>;
@@ -111,6 +117,31 @@
 			};
 		};
 	};
+
+	gc5035: gc5035@37 {
+		compatible = "galaxycore,gc5035";
+		status = "okay";
+		reg = <0x37>;
+		clocks = <&cru CLK_MIPI_CAMARAOUT_M3>;
+		clock-names = "xvclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&mipim1_camera3_clk>;
+
+		//reset pin control by hardware,used this pin switch to mipi input
+		//0->FRONT camera, 1->REAR camera
+		reset-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
+		pwdn-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+		rockchip,camera-module-index = <0>;
+		rockchip,camera-module-facing = "front";
+		rockchip,camera-module-name = "XHG-RKX11F-V5";
+		rockchip,camera-module-lens-name = "HR232H65";
+		port {
+			gc5035_out: endpoint {
+				remote-endpoint = <&mipi_in_ucam2>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
 };
 
 &mipi2_csi2 {