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Support RK3588 Orange Pi 5 Plus

This commit is contained in:
orangepi-xunlong 2023-04-10 09:20:03 +08:00
parent 4b897b01ff
commit 9d1ca3ddaa
154 changed files with 627 additions and 5230 deletions
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2
.gitignore vendored
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@ -42,6 +42,8 @@ external/cache/sources/orangepi-test
external/cache/sources/rk3588_packages* external/cache/sources/rk3588_packages*
external/cache/sources/rk-rootfs-build* external/cache/sources/rk-rootfs-build*
external/cache/sources/orangepi-firmware* external/cache/sources/orangepi-firmware*
external/cache/sources/wiringOP
external/cache/sources/wiringOP-Python
external/cache/sources/rk3399_gst_xserver_libs external/cache/sources/rk3399_gst_xserver_libs
external/cache/sources/arm-trusted-firmware-sunxi-mainline external/cache/sources/arm-trusted-firmware-sunxi-mainline
external/cache/debs/arm64/balena-etcher-electron_1.7.9+5945ab1f_arm64.deb external/cache/debs/arm64/balena-etcher-electron_1.7.9+5945ab1f_arm64.deb

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external/cache/debs/arm64/wiringpi_2.46.deb vendored
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external/cache/debs/arm64/wiringpi_2.47.deb vendored
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external/cache/debs/arm64/wiringpi_2.48.deb vendored Normal file
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39
external/cache/sources/linuxpg/68DPSPI.cfg vendored
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@ -1,39 +0,0 @@
; RTL8168DP Configuration file
; 2009/04/01
;
; Out of band MAC ID
NODEID = 00 E0 4C 68 00 20
;
; user login name
USERNAME = Administrator
; user password, password length has to be 16 bytes
; default password 'Realtek'
PASSWORD = 52 65 61 6c 74 65 6b 00 00 00 00 00 00 00 00 00
; operation role
; Administrator : 01
; Operator: 02
; Guest : 03
ROLE = 01
; OOB IP address
IP = 192.168.0.10
; OOB subnet mask
SUBNET = 255.255.255.0
; OOB gateway IP address
GATEWAY = 192.168.0.254
; OOB DNS server ip address
DNS = 192.168.0.1
; ASP console IP address
ASFIP = 192.168.0.3
; ASF function setting
; enable : ON
; disable : OFF
ASFON = ON
; IPV4 DHCP setting
; enable : ON
; disable : OFF
DHCPIPV4 = OFF
HOSTNAME = hostnameho
; hostname suffix
; enable : ON
; disable : OFF
HN_SUFFIX = ON

36
external/cache/sources/linuxpg/68EPSPI.cfg vendored
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@ -1,36 +0,0 @@
; RTL8168EP Configuration file
; 2018/03/30
;
; user login name
USERNAME = Administrator
; user password, password length has to be 16 bytes
; default password 'Realtek'
PASSWORD = 52 65 61 6c 74 65 6b 00 00 00 00 00 00 00 00 00
; operation role
; Administrator : 01
; Operator: 02
; Guest : 03
; ROLE = 01
; OOB IP address
IP = 192.168.0.10
; OOB subnet mask
SUBNET = 255.255.255.0
; OOB gateway IP address
GATEWAY = 192.168.0.254
; OOB DNS server ip address
; DNS = 192.168.0.1
; ASP console IP address
; ASFIP = 192.168.0.3
; ASF function setting
; enable : ON
; disable : OFF
; ASFON = ON
; IPV4 DHCP setting
; enable : ON
; disable : OFF
; DHCPIPV4 = OFF
HOSTNAME = DASHOOB
HN_SUFFIX = ON
;SARP_ADDR = C8
;USB_OTG = OFF
;WEBPAGE = OFF

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external/cache/sources/linuxpg/68EPSPIK.bin vendored
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36
external/cache/sources/linuxpg/68FPHSPI.cfg vendored
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@ -1,36 +0,0 @@
; RTL8168FPH Configuration file
; 2009/04/01
;
; user login name
USERNAME = Administrator
; user password, password length has to be 16 bytes
; default password 'Realtek'
PASSWORD = 52 65 61 6c 74 65 6b 00 00 00 00 00 00 00 00 00
; operation role
; Administrator : 01
; Operator: 02
; Guest : 03
;ROLE = 01
; OOB IP address
IP = 192.168.0.10
; OOB subnet mask
SUBNET = 255.255.255.0
; OOB gateway IP address
GATEWAY = 192.168.0.254
; OOB DNS server ip address
;DNS = 192.168.0.1
; ASP console IP address
;ASFIP = 192.168.0.3
; ASF function setting
; enable : ON
; disable : OFF
;ASFON = ON
; IPV4 DHCP setting
; enable : ON
; disable : OFF
; DHCPIPV4 = OFF
HOSTNAME = DASHOOB
HN_SUFFIX = ON
;SARP_ADDR = C8
;USB_OTG = OFF
;VNC_CONFIG = ORIGIN/PINCODE

37
external/cache/sources/linuxpg/68FPSPI.cfg vendored
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@ -1,37 +0,0 @@
; RTL8168FP Configuration file
; 2009/04/01
;
; user login name
USERNAME = Administrator
; user password, password length has to be 16 bytes
; default password 'Realtek'
PASSWORD = 52 65 61 6c 74 65 6b 00 00 00 00 00 00 00 00 00
; operation role
; Administrator : 01
; Operator: 02
; Guest : 03
;ROLE = 01
; OOB IP address
IP = 192.168.0.10
; OOB subnet mask
SUBNET = 255.255.255.0
; OOB gateway IP address
GATEWAY = 192.168.0.254
; OOB DNS server ip address
;DNS = 192.168.0.1
; ASP console IP address
;ASFIP = 192.168.0.3
; ASF function setting
; enable : ON
; disable : OFF
;ASFON = ON
; IPV4 DHCP setting
; enable : ON
; disable : OFF
;DHCPIPV4 = OFF
HOSTNAME = DASHOOB
HN_SUFFIX = ON
;SARP_ADDR = C8
;USB_OTG = OFF
;VNC_CONFIG = ORIGIN/PINCODE
;WEBPAGE = OFF

29
external/cache/sources/linuxpg/8100E.cfg vendored
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@ -1,29 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 00
CONFIG3 = 60
CONFIG4 = 00
CONFIG5 = 03
PMC = C2 F7
ROMBAR = 00
ROMCONF = 3F
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;PCI-E Parameter
PCIE1= 04 01 42 63 7E 00 00 04
PCIE2= FF FF FF FF FF FF 1F
PCIE3= 00 47 10 F0 F0 01 BF 01 00 00 60 00 00
;0AH,0BH,18H,1A~1EH
;28H~2EH
;30H~31H, 34H~3EH
VERSION = 1.031

8
external/cache/sources/linuxpg/8100E.map vendored
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@ -1,8 +0,0 @@
29 81 EC 10 23 01 EC 10 36 81 04 01 00 60 00 E0
4C 36 00 00 00 CF C2 F7 42 00 63 7E 00 00 04 03
00 E0 4C 36 00 00 00 01 FF FF FF FF FF FF 1F 00
00 47 D5 B5 10 F0 F0 01 BF 01 00 00 60 00 00 3F
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

29
external/cache/sources/linuxpg/8101E.cfg vendored
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@ -1,29 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 20
CONFIG3 = 60
CONFIG4 = 00
CONFIG5 = 03
PMC = C2 F7
ROMBAR = 00
ROMCONF = 3F
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;PCI-E Parameter
PCIE1= 04 01 42 60 7E 00 00 04
PCIE2= FF FF FF FF FF FF 1F
PCIE3= 00 47 30 F0 F0 00 2F 00 00 00 60 00 00
;0AH,0BH,18H,1A~1E
;28H~2EH
;30H~31H, 34H~3EH
VERSION = 1.031

8
external/cache/sources/linuxpg/8101E.map vendored
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@ -1,8 +0,0 @@
29 81 EC 10 36 81 EC 10 23 01 04 01 20 60 00 E0
4C 36 00 00 00 CF C2 F7 42 00 60 7E 00 00 04 03
00 E0 4C 36 00 00 00 01 FF FF FF FF FF FF 1F 00
00 47 5A E1 30 F0 F0 00 2F 00 00 00 60 00 00 3F
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

56
external/cache/sources/linuxpg/8102E.cfg vendored
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@ -1,56 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
CONFIGx = 3C
CONFIG3 = 62
CONFIG4 = 14
CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;PCI-E Parameter
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = c1 86 80 02 00 00 11 3c 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 27 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 10 00 21 00 10 00 21 00 00 80
;34H~3EH 40H~42H
C_PCIE4 = 80 00 20 00 00 00
;46H~49H 52~53H
C_EPHY = 70 22 1D AF 6B 35 00
;43H~45H 54H~57H
VERSION = 1.031

32
external/cache/sources/linuxpg/8102E.map vendored
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@ -1,32 +0,0 @@
29 81 EC 10 36 81 EC 10 23 01 04 01 3C 62 00 E0
4C 36 00 00 00 0F C3 FF 14 02 C1 86 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 27 AA 03
02 20 38 AC 80 02 00 20 10 00 21 00 10 00 21 3F
00 00 80 70 22 1D 80 00 20 00 E0 00 36 4C 00 00
01 00 00 00 AF 6B 35 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

44
external/cache/sources/linuxpg/8102EF.cfg vendored
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@ -1,44 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
;CONFIGx = 3C
CONFIG3 = 62
CONFIG4 = 14
;CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 00 00
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
VERSION = 1.031

56
external/cache/sources/linuxpg/8103E.cfg vendored
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@ -1,56 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;PCI-E Parameter
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = c1 86 80 02 00 00 11 3c 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 27 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 10 00 21 00 10 00 21 00 00 80
;34H~3EH 40H~42H
C_PCIE4 = 80 00 20 00 00 00
;46H~49H 52~53H
C_EPHY = 71 22 98 AF 6B 39 35
;43H~45H 54H~57H
VERSION = 1.031

32
external/cache/sources/linuxpg/8103E.map vendored
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@ -1,32 +0,0 @@
29 81 EC 10 36 81 EC 10 23 01 04 01 3C 60 00 E0
4C 36 00 00 00 0F C3 FF 14 02 C1 86 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 27 AA 03
02 20 38 AC 80 02 00 20 10 00 21 00 10 00 21 3F
00 00 80 71 22 98 80 00 20 00 E0 00 36 4C 00 00
01 00 00 00 AF 6B 39 35 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

47
external/cache/sources/linuxpg/8103EF.cfg vendored
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@ -1,47 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
;CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
;CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 00 00
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;EPHY = Address HIGH_BYTE LOW_BYTE ...
;EPHY = 03 00 FB
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
VERSION = 1.031

56
external/cache/sources/linuxpg/8103EL.cfg vendored
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@ -1,56 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;EndID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
CONFIGx = 3C
CONFIG3 = 62
CONFIG4 = 14
CONFIG5 = 82
PMC = C3 FF
ROMBAR = 00
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;PCI-E Parameter
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = c1 86 80 02 00 00 11 3c 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 27 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 10 00 21 00 10 00 21 00 00 80
;34H~3EH 40H~42H
C_PCIE4 = 80 00 20 00 00 00
;46H~49H 52~53H
C_EPHY = 71 22 98 AF 6B 39 35
;43H~45H 54H~57H
VERSION = 1.031

8
external/cache/sources/linuxpg/8103EL.map vendored
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@ -1,8 +0,0 @@
29 81 EC 10 36 81 EC 10 23 01 04 01 3C 62 00 E0
4C 36 00 01 00 0F C3 FF 14 82 C1 86 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 27 AA 03
02 20 54 9E 80 02 00 20 10 00 21 00 10 00 21 3F
00 00 80 71 22 98 80 00 20 00 E0 00 36 4C 00 00
01 00 00 00 AF 6B 39 35 FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

47
external/cache/sources/linuxpg/8103ELEF.cfg vendored
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@ -1,47 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
;CONFIGx = 3C
CONFIG3 = 62
CONFIG4 = 14
CONFIG5 = 82
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 00 00
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;EPHY = Address HIGH_BYTE LOW_BYTE ...
;EPHY = 03 00 FB
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
VERSION = 1.031

60
external/cache/sources/linuxpg/8104E.cfg vendored
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@ -1,60 +0,0 @@
NODEID = 00 E0 4C 37 00 01
;ENDID = 00 E0 4C 37 FF FF
VID = 10 EC
DID = 81 37
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 9C
CONFIG3 = 62
CONFIG4 = 04
CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 37 00 00 00 01
;PCI-E Parameter (Do not change without Realtek approval)
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = c0 8C 80 02 00 00 11 3c 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 27 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 04 40 20 00 04 40 20 00 00 20
;34H~3EH 40H~42H
C_PCIE4 = 60 00 0A 00 00 00
;46H~49H 52~53H
C_EPHY = E1 22 B5 B2 73 75 EA
;43H~45H 54H~57H
D_EPHY = 87 75 7A 39
;58H~5BH
VERSION = 1.031

32
external/cache/sources/linuxpg/8104E.map vendored
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@ -1,32 +0,0 @@
29 81 EC 10 37 81 EC 10 23 01 04 01 9C 62 00 E0
4C 37 00 01 00 CF C3 FF 04 02 C0 8C 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 27 AA 03
02 20 99 A5 80 02 00 20 04 40 20 00 04 40 20 3F
00 00 20 E1 22 B5 60 00 0A 00 E0 00 68 4C 00 00
01 00 00 00 B2 73 75 EA 87 75 7A 39 CA 98 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

46
external/cache/sources/linuxpg/8104EF.cfg vendored
View File

@ -1,46 +0,0 @@
NODEID = 00 E0 4C 37 00 01
;ENDID = 00 E0 4C 37 FF FF
VID = 10 EC
DID = 81 37
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 9C
CONFIG3 = 62
CONFIG4 = 04
CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 37 00 00 00 01
VERSION = 1.031

65
external/cache/sources/linuxpg/8105E.cfg vendored
View File

@ -1,65 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
CONFIGx = 1C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;PCI-E Parameter (Do not change without Realtek approval)
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = C0 8C 80 02 00 00 11 3C 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 13 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 04 40 20 00 04 40 20 00 00 20
;34H~3EH 40H~42H
C_PCIE4 = 60 00 0A 00 00 00
;46H~49H 52~53H
C_EPHY = B9 6A 98 AC 6B 75 80
;43H~45H 54H~57H
D_EPHY = 8D 75 7B 01
;58H~5BH
E0_EPHY = 48
;5EH
VERSION = 1.031

8
external/cache/sources/linuxpg/8105E.map vendored
View File

@ -1,8 +0,0 @@
29 81 EC 10 36 81 EC 10 23 01 04 01 1C 60 00 E0
4C 36 00 01 00 0F C3 FF 14 82 C0 8C 80 02 00 00
11 3C 07 00 10 20 76 76 00 63 01 01 FF 13 AA 03
02 20 99 A5 80 02 00 20 04 40 20 00 04 40 20 3F
00 00 20 B9 6A 98 60 00 0A 00 E0 00 36 4C 00 00
01 00 00 00 AC 6B 75 80 8D 75 7B 01 CA 98 48 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

65
external/cache/sources/linuxpg/8105EC.cfg vendored
View File

@ -1,65 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
CONFIGx = 1C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;PCI-E Parameter (Do not change without Realtek approval)
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = C0 8C 80 02 00 00 11 3C 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 13 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 04 40 20 00 04 40 20 00 00 20
;34H~3EH 40H~42H
C_PCIE4 = 60 00 0A 00 00 00
;46H~49H 52~53H
C_EPHY = B9 6A 98 AC 6B 76 80
;43H~45H 54H~57H
D_EPHY = 6D 75 7B 01
;58H~5BH
E_EPHY = 48 87 79 07 80
;5EH~62H
VERSION = 1.031

8
external/cache/sources/linuxpg/8105EC.map vendored
View File

@ -1,8 +0,0 @@
29 81 EC 10 36 81 EC 10 23 01 04 01 1C 60 00 E0
4C 36 00 03 00 0F C3 FF 14 82 C0 8C 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 13 AA 03
02 20 00 EA 80 02 00 20 04 40 20 00 04 40 20 3F
00 00 20 B9 6A 98 60 00 0A 00 E0 00 36 4C 00 00
03 00 00 00 AC 6B 76 80 6D 75 7B 01 CA 98 48 87
79 07 80 FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

48
external/cache/sources/linuxpg/8105ECEF.cfg vendored
View File

@ -1,48 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
CONFIGx = 1C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
VERSION = 1.031

48
external/cache/sources/linuxpg/8105EF.cfg vendored
View File

@ -1,48 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
CONFIGx = 1C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
VERSION = 1.031

65
external/cache/sources/linuxpg/8106E.cfg vendored
View File

@ -1,65 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 1C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 90 CA
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;PCI-E Parameter (Do not change without Realtek approval)
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = C0 8C 80 02 00 00 11 3C 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 13 00 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 04 40 20 00 04 40 20 00 00 20
;34H~3EH 40H~42H
C_PCIE4 = 60 00 0A 00 00 00
;46H~49H 52~53H
C_EPHY = B9 6A 98 AC 6B 76 80
;43H~45H 54H~57H
D_EPHY = 6D 75 7B 01
;58H~5BH
E_EPHY = 48 87 79 07 80
;5EH~62H
VERSION = 1.031

8
external/cache/sources/linuxpg/8106E.map vendored
View File

@ -1,8 +0,0 @@
29 81 EC 10 36 81 EC 10 23 01 04 01 1C 60 00 E0
4C 36 00 03 00 CF C3 FF 14 82 C0 8C 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 13 00 03
02 20 00 EA 80 02 00 20 04 40 20 00 04 40 20 3F
00 00 20 B9 6A 98 60 00 0A 00 E0 00 36 4C 00 00
03 00 00 00 AC 6B 76 80 6D 75 7B 01 CA 90 48 87
79 07 80 FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

53
external/cache/sources/linuxpg/8106EEF.cfg vendored
View File

@ -1,53 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 1C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 90 CA
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;LANCFG
;BIT 0:LAN Disable
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
VERSION = 1.031

49
external/cache/sources/linuxpg/8106EU.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
VID = 10 EC
DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

54
external/cache/sources/linuxpg/8106EUEF.cfg vendored
View File

@ -1,54 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;DISFUNCXIOBAR = 00
VERSION = 1.031

49
external/cache/sources/linuxpg/8107E.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 37
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

58
external/cache/sources/linuxpg/8107EEF.cfg vendored
View File

@ -1,58 +0,0 @@
NODEID = 00 E0 4C 36 00 01
;ENDID = 00 E0 4C 36 FF FF
;VID = 10 EC
;DID = 81 36
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 36 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;CTAPSHORT
;Enable set to 01H, Disable set to 00H
;CTAPSHORT = 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

BIN
external/cache/sources/linuxpg/8110SC.bin vendored
View File

Binary file not shown.

39
external/cache/sources/linuxpg/8110SC.cfg vendored
View File

@ -1,39 +0,0 @@
NODEID = 00 E0 4C 67 00 01
;ENDID = 00 E0 4C 67 FF FF
VID = 10 EC
DID = 81 67
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
MNGNT = 20
MXLAT = 40
CONFIGx = 01
CONFIG3 = A1
CONFIG0 = 15
CONFIG1 = CD
CONFIG4 = 80
CONFIG5 = 13
PMC = C2 F7
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Seconds
VERSION = 1.031

8
external/cache/sources/linuxpg/8110SC.map vendored
View File

@ -1,8 +0,0 @@
29 81 EC 10 67 81 EC 10 23 01 20 40 01 A1 00 E0
4C 67 10 40 15 CD C2 F7 00 80 00 00 00 00 00 13
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 D7 7E 00 00 00 00 00 00 00 00 00 00 00 3F
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70
external/cache/sources/linuxpg/8116AFEF.cfg vendored
View File

@ -1,70 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;LEDSUBCFG
;Please make sure CONFIGX LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LEDSUBCFG
;BIT 0:LED0 Low Power Enable in D3cold BIT 1:LED1 Low Power Enable in D3cold
;BIT 2:LED2 Low Power Enable in D3cold
;BIT 3:LED0 Preboot Enable BIT 4: LED1 Preboot Enable
;BIT 5:LED2 Preboot Enable
;LEDSUBCFG = 00
;Disable: 00, Enable: 01
;Secure boot
;SECUREBOOT = 01
;PCIE Link Capability
;LINKPCIEGEN = 11
;Disable multi-function X
;DISABLEFUNCX = 00
VERSION = 1.031

36
external/cache/sources/linuxpg/8116AFFL.cfg vendored
View File

@ -1,36 +0,0 @@
; RTL8168FP Configuration file
; 2009/04/01
;
; Out of band MAC ID
;NODEID = 00 E0 4C 68 03 DD
;
; user login name
USERNAME = Administrator
; user password, password length has to be 16 bytes
; default password 'realtek'
PASSWORD = 52 65 61 6c 74 65 6b 00 00 00 00 00 00 00 00 00
; operation role
; Administrator : 01
; Operator: 02
; Guest : 03
;ROLE = 01
; OOB IP address
IP = 192.168.0.10
; OOB subnet mask
SUBNET = 255.255.250.0
; OOB gateway IP address
GATEWAY = 192.168.0.254
; OOB DNS server ip address
;DNS = 192.168.0.1
; ASP console IP address
;ASFIP = 192.168.0.3
; ASF function setting
; enable : ON
; disable : OFF
;ASFON = ON
; IPV4 DHCP setting
; enable : ON
; disable : OFF
;DHCPIPV4 = OFF
HOSTNAME = DASHOOB
HN_SUFFIX = ON

70
external/cache/sources/linuxpg/8116ASEF.cfg vendored
View File

@ -1,70 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;LEDSUBCFG
;Please make sure CONFIGX LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LEDSUBCFG
;BIT 0:LED0 Low Power Enable in D3cold BIT 1:LED1 Low Power Enable in D3cold
;BIT 2:LED2 Low Power Enable in D3cold
;BIT 3:LED0 Preboot Enable BIT 4: LED1 Preboot Enable
;BIT 5:LED2 Preboot Enable
;LEDSUBCFG = 00
;Disable: 00, Enable: 01
;Secure boot
;SECUREBOOT = 01
;PCIE Link Capability
;LINKPCIEGEN = 11
;Disable multi-function X
;DISABLEFUNCX = 00
VERSION = 1.031

36
external/cache/sources/linuxpg/8116ASFL.cfg vendored
View File

@ -1,36 +0,0 @@
; RTL8168FP Configuration file
; 2009/04/01
;
; Out of band MAC ID
;NODEID = 00 E0 4C 68 03 DD
;
; user login name
USERNAME = Administrator
; user password, password length has to be 16 bytes
; default password 'realtek'
PASSWORD = 52 65 61 6c 74 65 6b 00 00 00 00 00 00 00 00 00
; operation role
; Administrator : 01
; Operator: 02
; Guest : 03
;ROLE = 01
; OOB IP address
IP = 192.168.0.10
; OOB subnet mask
SUBNET = 255.255.250.0
; OOB gateway IP address
GATEWAY = 192.168.0.254
; OOB DNS server ip address
;DNS = 192.168.0.1
; ASP console IP address
;ASFIP = 192.168.0.3
; ASF function setting
; enable : ON
; disable : OFF
;ASFON = ON
; IPV4 DHCP setting
; enable : ON
; disable : OFF
;DHCPIPV4 = OFF
HOSTNAME = DASHOOB
HN_SUFFIX = ON

76
external/cache/sources/linuxpg/8116EF.cfg vendored
View File

@ -1,76 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;LEDSUBCFG
;Please make sure CONFIGX LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LEDSUBCFG
;BIT 0:LED0 Low Power Enable in D3cold BIT 1:LED1 Low Power Enable in D3cold
;BIT 2:LED2 Low Power Enable in D3cold
;BIT 3:LED0 Preboot Enable BIT 4: LED1 Preboot Enable
;BIT 5:LED2 Preboot Enable
;LEDSUBCFG = 00
;Disable: 00, Enable: 01
;UPS mode power saving
;UPSMODEPWRSAVING = 00
;Secure boot
;SECUREBOOT = 01
;PCIE Link Capability
;LINKPCIEGEN = 11
;Disable multi-function X
;DISABLEFUNCX = 00
VERSION = 1.031

36
external/cache/sources/linuxpg/8116FL.cfg vendored
View File

@ -1,36 +0,0 @@
; RTL8168FP Configuration file
; 2009/04/01
;
; Out of band MAC ID
;NODEID = 00 E0 4C 68 03 DD
;
; user login name
USERNAME = Administrator
; user password, password length has to be 16 bytes
; default password 'realtek'
PASSWORD = 52 65 61 6c 74 65 6b 00 00 00 00 00 00 00 00 00
; operation role
; Administrator : 01
; Operator: 02
; Guest : 03
;ROLE = 01
; OOB IP address
IP = 192.168.0.10
; OOB subnet mask
SUBNET = 255.255.250.0
; OOB gateway IP address
GATEWAY = 192.168.0.254
; OOB DNS server ip address
;DNS = 192.168.0.1
; ASP console IP address
;ASFIP = 192.168.0.3
; ASF function setting
; enable : ON
; disable : OFF
;ASFON = ON
; IPV4 DHCP setting
; enable : ON
; disable : OFF
;DHCPIPV4 = OFF
HOSTNAME = DASHOOB
HN_SUFFIX = ON

82
external/cache/sources/linuxpg/8117APEF.cfg vendored
View File

@ -1,82 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;LEDSUBCFG
;Please make sure CONFIGX LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LEDSUBCFG
;BIT 0:LED0 Low Power Enable in D3cold BIT 1:LED1 Low Power Enable in D3cold
;BIT 2:LED2 Low Power Enable in D3cold
;BIT 3:LED0 Preboot Enable BIT 4: LED1 Preboot Enable
;BIT 5:LED2 Preboot Enable
;LEDSUBCFG = 00
;Disable: 00, Enable: 01
;UPHY Reset USB Bypass mode
;USBBYPASSMODE = 00
;UPS mode power saving
;UPSMODEPWRSAVING = 00
;Secure boot
;SECUREBOOT = 01
;EHCI PMC
;Enable EHCI PME_D3cold & PME_D3hot support in PMC
EHCIPMC = C3 FF
;PCIE Link Capability
;LINKPCIEGEN = 11
;Disable multi-function X
;DISABLEFUNCX = 00
VERSION = 1.031

82
external/cache/sources/linuxpg/8117EF.cfg vendored
View File

@ -1,82 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;LEDSUBCFG
;Please make sure CONFIGX LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LEDSUBCFG
;BIT 0:LED0 Low Power Enable in D3cold BIT 1:LED1 Low Power Enable in D3cold
;BIT 2:LED2 Low Power Enable in D3cold
;BIT 3:LED0 Preboot Enable BIT 4: LED1 Preboot Enable
;BIT 5:LED2 Preboot Enable
;LEDSUBCFG = 00
;Disable: 00, Enable: 01
;UPHY Reset USB Bypass mode
;USBBYPASSMODE = 00
;UPS mode power saving
;UPSMODEPWRSAVING = 00
;Secure boot
;SECUREBOOT = 01
;EHCI PMC
;Enable EHCI PME_D3cold & PME_D3hot support in PMC
EHCIPMC = C3 FF
;PCIE Link Capability
;LINKPCIEGEN = 11
;Disable multi-function X
;DISABLEFUNCX = 00
VERSION = 1.031

49
external/cache/sources/linuxpg/8118.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 37
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

8
external/cache/sources/linuxpg/8118.map vendored
View File

@ -1,8 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01
00 E0 4C 68 00 00 00 01 84 FA 3F FF 19 4C 30 02
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

65
external/cache/sources/linuxpg/8118EF.cfg vendored
View File

@ -1,65 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;SpeedUp Capability
;Enable GPHY speed up by MAC set to 29H, Disable GPHY speed up by MAC set to 21H
;PHYPWRFUN = 21
;CTAPSHORT
;Enable set to 01H, Disable set to 00H
;CTAPSHORT = 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

72
external/cache/sources/linuxpg/8118KB.cfg vendored
View File

@ -1,72 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 62
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;For add-on device, please set CONFIG3 to 60H
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 17
;PMC = C3 FF
;ROMBAR = 00
;LEDXCFG = High-Byte Low-Byte
;LEDX Bit 11: Low power mode enable
;LEDX Bit 10: Preboot enable
;Please make sure CONFIGx LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LED low power mode or LED preboot
;LED0CFG = 02 01
;LED1CFG = 02 02
;LED2CFG = 02 08
;LED3CFG = 02 20
;LED Feature Functions
;Set BIT 0 to 0 : V1 led table.
;Set BIT 0 to 1 : V2 led table.
;BIT 1 to BIT 7 : Reserved
;LEDFEATUREFUNC = 60
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;MDI swap
;MDI non-swap set to 00H, MDI swap set to 20H
;MDISWAP = 00
;Tx polarity swap
;BIT 7: P3 non-swap set to 1, P3 swap set to 0
;BIT 6: P2 non-swap set to 0, P2 swap set to 1
;BIT 5: P1 non-swap set to 1, P1 swap set to 0
;BIT 4: P0 non-swap set to 0, P0 swap set to 1
;BIT 0 to BIT 3 : Reserved
;TXPOLSWAP = A0
;DISFUNCXIOBAR = 00
VERSION = 1.031

77
external/cache/sources/linuxpg/8118KBEF.cfg vendored
View File

@ -1,77 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 62
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;For add-on device, please set CONFIG3 to 60H
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDXCFG = High-Byte Low-Byte
;LEDX Bit 11: Low power mode enable
;LEDX Bit 10: Preboot enable
;Please make sure CONFIGx LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LED low power mode or LED preboot
;LED0CFG = 02 01
;LED1CFG = 02 02
;LED2CFG = 02 08
;LED3CFG = 02 20
;LED Feature Functions
;Set BIT 0 to 0 : V1 led table.
;Set BIT 0 to 1 : V2 led table.
;BIT 1 to BIT 7 : Reserved
;LEDFEATUREFUNC = 60
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;MDI swap
;MDI non-swap set to 00H, MDI swap set to 20H
;MDISWAP = 00
;Tx polarity swap
;BIT 7: P3 non-swap set to 1, P3 swap set to 0
;BIT 6: P2 non-swap set to 0, P2 swap set to 1
;BIT 5: P1 non-swap set to 1, P1 swap set to 0
;BIT 4: P0 non-swap set to 0, P0 swap set to 1
;BIT 0 to BIT 3 : Reserved
;TXPOLSWAP = A0
;DISFUNCXIOBAR = 00
VERSION = 1.031

49
external/cache/sources/linuxpg/8119.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
VERSION = 1.031

32
external/cache/sources/linuxpg/8119.map vendored
View File

@ -1,32 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01
01 00 00 00 68 4C E0 00 CA C9 30 FF 18 51 00 18
52 CF 18 53 3C 18 54 60 18 55 14 18 56 02 50 42
C3 FF 40 30 00 FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

58
external/cache/sources/linuxpg/8119EF.cfg vendored
View File

@ -1,58 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 03 00
;PHYANAR = 01 E1
VERSION = 1.031

12
external/cache/sources/linuxpg/8125BGEF.cfg vendored
View File

@ -2,20 +2,20 @@ NODEID = 00 E0 4C 68 00 0F
;ENDID = 00 E0 4C 68 FF FF ;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC ;VID = 10 EC
;DID = 81 25 ;DID = 81 25
SVID = 10 EC ;SVID = 10 EC
SMID = 01 23 ;SMID = 01 23
;Do not change following parameters without Realtek approval ;Do not change following parameters without Realtek approval
;CONFIG0 = 00 ;CONFIG0 = 00
;CONFIG1 = CF ;CONFIG1 = CF
CONFIGx = 3C ;CONFIGx = 3C
;For add-on device, please set CONFIG3 to 60H ;For add-on device, please set CONFIG3 to 60H
;CONFIG3 = 60 ;CONFIG3 = 60
;CONFIG4 = 14 ;CONFIG4 = 14
;CONFIG5 = 02 ;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1 ;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A ;CONFIG5 = 0A
CONFIG7 = 07 ;CONFIG7 = 07
;PMC = C3 FF ;PMC = C3 FF
;ROMBAR = 00 ;ROMBAR = 00
;LEDXCFG = High-Byte Low-Byte ;LEDXCFG = High-Byte Low-Byte
@ -32,7 +32,7 @@ LED2CFG = 1A 2B
;Set BIT 0 to 1 : V2 led table. ;Set BIT 0 to 1 : V2 led table.
;BIT 1 to BIT 7 : Reserved ;BIT 1 to BIT 7 : Reserved
;LEDFEATUREFUNC = 60 ;LEDFEATUREFUNC = 60
ROMCONF = 3F ;ROMCONF = 3F
;Bit 7-6 Boot Protocol ;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol ; 00 ==> PXE protocol
; 01 ==> RPL protocol ; 01 ==> RPL protocol
@ -54,7 +54,7 @@ ROMCONF = 3F
; 11 ==> 0 Second ; 11 ==> 0 Second
;Serial Number in PCI Config Space ;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01 ;SN = 00 E0 4C 68 00 00 00 01
;LANCFG ;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK ;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK

49
external/cache/sources/linuxpg/8168.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 00
CONFIG3 = 60
CONFIG4 = 00
CONFIG5 = 03
PMC = C2 F7
ROMBAR = 00
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;PCI-E Parameter
PCIE1= 04 01 42 60 7E 00 00 04
PCIE2= FF FF FF FF FF FF 1F
PCIE3= 00 47 10 F0 F0 01 BF 01 00 00 60 00 00
;0AH,0BH,18H,1A~1EH
;28H~2EH
;30H~31H, 34H~3EH
VERSION = 1.031

16
external/cache/sources/linuxpg/8168.map vendored
View File

@ -1,16 +0,0 @@
29 81 EC 10 68 81 EC 10 23 01 04 01 00 60 00 E0
4C 68 00 01 00 CF C2 F7 42 00 60 7E 00 00 04 03
00 E0 4C 68 00 00 00 01 FF FF FF FF FF FF 1F 00
00 46 0A C3 10 F0 F0 01 BF 01 00 00 60 00 00 3F
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

56
external/cache/sources/linuxpg/8168C.cfg vendored
View File

@ -1,56 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 0C
CONFIG3 = 62
CONFIG4 = 00
CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;PCI-E Parameter (Do not change without Realtek approval)
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = c1 8C 80 02 00 00 11 3c 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 27 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 10 00 21 00 10 00 21 00 00 80
;34H~3EH 40H~42H
C_PCIE4 = 80 00 20 00 00 00
;46H~49H 52~53H
C_EPHY = 61 42 55 9E 72 B5 00
;43H~45H 54H~57H
VERSION = 1.031

32
external/cache/sources/linuxpg/8168C.map vendored
View File

@ -1,32 +0,0 @@
29 81 EC 10 68 81 EC 10 23 01 04 01 0C 62 00 E0
4C 68 00 01 00 CF C3 FF 00 02 C1 8C 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 27 AA 03
02 20 1C AC 80 02 00 20 10 00 21 00 10 00 21 3F
00 00 80 61 42 55 80 00 20 00 E0 00 68 4C 00 00
01 00 00 00 9E 72 B5 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

106
external/cache/sources/linuxpg/8168CP.cfg vendored
View File

@ -1,106 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 4C
CONFIG3 = E2
CONFIG4 = 00
CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;PCI-E Parameter (Do not change without Realtek approval)
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = C1 8C 80 02 00 00 11 3c 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 27 AA 03 02 20
;;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 10 00 21 00 10 00 21 00 00 80
;34H~3EH 40H~42H
C_PCIE4 = 80 00 20 00 00 00
;46H~49H 52~53H
C_EPHY = 61 42 5F 9E 74 F5 00
;43H~45H 54H~57H
CP_CONSOLE_NODEID = 00 00 00 00 00 00
CP_CONSOLE_IP = 00 00 00 00
CP_CLIENT_IP = 00 00 00 00
CP_OPERATOR_KEY = 98 73 F0 5B 1C 67 CC 50 D1 1E 2B B1 10 0D BB C3 8D D7 08 E2
CP_ADMINISTRATOR_KEY = 10 67 B4 D0 D5 2B C5 0C 3A AF 66 69 B7 34 45 99 28 F4 F9 CC
CP_GENERATOR_KEY = DE EF 16 3B FB 8C 30 50 6B 3B F1 13 77 35 4D 9C 55 BD EB 87
CP_RANDOM_KEY = 85 DB 22 6F 49 98 55 2C 22 D0 1A EA 88 51 45 48 AA 4F 65 3E
CP_REMOTE_CONTROL = 88 00 03 88 00 02 88 00 01 88 00 04
;Remote Control Parameter
;INTEL ==> 88 00 03 88 00 02 88 00 01 88 00 04
;AMD ==> 71 00 00 71 02 00 71 01 00 71 03 00
;NVIDIA ==> E0 0A 00 E0 0A 02 E0 0A 01 E0 0A 03
;Legacy sensor polling parameter
CP_LSP0 = 5F C0 FF 37 01 01 09 10 00 03 01
;E0H~EAH
CP_LSP1 = 5F 42 20 20 05 6F 00 08 01 00 01
;EBH~F5H
CP_LSP2 = 5F 28 FF FF 04 07 02 10 0A 03 01
;F6H~100H
CP_LSP3 = 5F 29 FF FF 04 07 02 10 0B 07 01
;101~10BH
CP_LSP4 = 5F 20 FF 90 02 07 02 10 01 03 01
;10CH~116H
CP_LSP5 = 5F 22 FF 49 02 07 02 10 03 07 01
;117H~121H
CP_LSP6 = 5F 23 FF 4D 02 07 02 10 04 07 02
;122H~12CH
CP_LSP7 = 5F 24 FF 4D 02 07 02 10 05 07 03
;12DH~137H
;UUID
CP_UUID = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
;SYSTEM ID
CP_SYSID = 00 00
CP_EXTENDED_58_5F = 00 00 00 00 00 00 00 00
CP_EXTENDED_60 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_80_8B = 9B AB 0C 00 32 00 03 0A 03 0F C8 00
CP_EXTENDED_AA_AD = 00 00 6A 92
CP_EXTENDED_B0_BF = 70 75 62 6C 69 63 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_C0_CF = 00 00 00 00 00 00 00 19 67 F8 00 00 00 1F F0 00
CP_EXTENDED_DC_DF = 7E 00 FF 03
CP_EXTENDED_138_143 = 04 00 00 00 00 40 06 00 01 00 00 00
CP_EXTENDED_194_19F = 00 00 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_1A0 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_1C0 = 00 00 00 00 00 00 00 A2 00 A2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_1E0 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
;80H~1FFH
VERSION = 1.031

32
external/cache/sources/linuxpg/8168CP.map vendored
View File

@ -1,32 +0,0 @@
29 81 EC 10 68 81 EC 10 23 01 04 01 4C E2 00 E0
4C 68 00 01 00 CF C3 FF 00 02 C1 8C 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 27 AA 03
02 20 DC A5 80 02 00 20 10 00 21 00 10 00 21 3F
00 00 80 61 42 5F 80 00 20 00 E0 00 68 4C 00 00
01 00 00 00 9E 74 F5 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9B AB 0C 00 32 00 03 0A 03 0F C8 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 6A 92 00 00
70 75 62 6C 69 63 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 19 67 F8 00 00 00 1F F0 00
88 00 03 88 00 02 88 00 01 88 00 04 7E 00 FF 03
89 04 FF 0D 07 6F 04 20 00 03 00 89 04 FF 01 05
6F 00 08 01 17 00 80 23 FF 00 04 07 02 10 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 04 00 00 00 00 40 06 00
01 00 00 00 E2 08 D7 8D C3 BB 0D 10 B1 2B 1E D1
50 CC 67 1C 5B F0 73 98 CC F9 F4 28 99 45 34 B7
69 66 AF 3A 0C C5 2B D5 D0 B4 67 10 87 EB BD 55
9C 4D 35 77 13 F1 3B 6B 50 30 8C FB 3B 16 EF DE
3E 65 4F AA 48 45 51 88 EA 1A D0 22 2C 55 98 49
6F 22 DB 85 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 A2 00 A2 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

62
external/cache/sources/linuxpg/8168D.cfg vendored
View File

@ -1,62 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 9C
CONFIG3 = 62
CONFIG4 = 04
CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;PCI-E Parameter (Do not change without Realtek approval)
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = c0 8C 80 02 00 00 11 3c 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 27 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 04 40 20 00 04 40 20 00 00 20
;34H~3EH 40H~42H
C_PCIE4 = 60 00 0A 00 00 00
;46H~49H 52~53H
C_EPHY = 63 02 35 B2 73 71 80
C0_EPHY = E3 02 BD B2 63 B5 EA
;43H~45H 54H~57H
D_EPHY = 87 75 7B 39
D0_EPHY = 84 75 7A 39
;58H~5BH
VERSION = 1.031

32
external/cache/sources/linuxpg/8168D.map vendored
View File

@ -1,32 +0,0 @@
29 81 EC 10 68 81 EC 10 23 01 04 01 9C 62 00 E0
4C 68 00 01 00 CF C3 FF 04 02 C0 8C 80 02 00 00
11 3C 07 00 10 20 76 00 63 01 01 FF 00 27 AA 03
02 20 99 A5 80 02 00 20 04 40 20 00 04 40 20 3F
00 00 20 E1 22 B5 60 00 0A 00 E0 00 68 4C 00 00
01 00 00 00 B2 73 75 EA 87 75 7A 39 CA 98 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

46
external/cache/sources/linuxpg/8168DEF.cfg vendored
View File

@ -1,46 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 9C
CONFIG3 = 62
CONFIG4 = 04
CONFIG5 = 02
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
VERSION = 1.031

28
external/cache/sources/linuxpg/8168DPEF.cfg vendored
View File

@ -1,28 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 98
CONFIG3 = 60
;CONFIG4 = 04
;CONFIG5 = 02
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 98 CA
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;Multi Function Configuration.
;Enable Multi function set to 01H, Disable Multi function set to 00H
;MULTIFUN = 01
VERSION = 1.031

122
external/cache/sources/linuxpg/8168E.cfg vendored
View File

@ -1,122 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = 0F
;Asf Disable
CONFIGx = 1C
CONFIG3 = 60
;Asf Enable
;CONFIGx = 5D
;CONFIG3 = E0
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;PCI-E Parameter (Do not change without Realtek approval)
C_PCIE0 = 04 01
;0AH~0BH
C_PCIE1 = C0 8C 80 02 00 00 11 3C 07 00 10 20
;1AH~25H
C_PCIE2 = 76 00 63 01 01 FF 13 AA 03 02 20
;26H~2BH 2DH~31H
C_PCIE3 = 80 02 00 20 04 40 20 00 04 40 20 00 00 20
;34H~3EH 40H~42H
C_PCIE4 = 60 00 0A 00 00 00
;46H~49H 52~53H
C_EPHY = B9 6A 98 AC 6B 75 80
;43H~45H 54H~57H
D_EPHY = 8D 75 7B 01
;58H~5BH
E0_EPHY = 48
;5EH
CP_CONSOLE_NODEID = 00 00 00 00 00 00
CP_CONSOLE_IP = 00 00 00 00
CP_CLIENT_IP = 00 00 00 00
CP_OPERATOR_KEY = 98 73 F0 5B 1C 67 CC 50 D1 1E 2B B1 10 0D BB C3 8D D7 08 E2
CP_ADMINISTRATOR_KEY = 10 67 B4 D0 D5 2B C5 0C 3A AF 66 69 B7 34 45 99 28 F4 F9 CC
CP_GENERATOR_KEY = DE EF 16 3B FB 8C 30 50 6B 3B F1 13 77 35 4D 9C 55 BD EB 87
CP_RANDOM_KEY = 85 DB 22 6F 49 98 55 2C 22 D0 1A EA 88 51 45 48 AA 4F 65 3E
CP_REMOTE_CONTROL = 88 00 03 88 00 02 88 00 01 88 00 04
;Remote Control Parameter
;INTEL ==> 88 00 03 88 00 02 88 00 01 88 00 04
;AMD ==> 71 00 00 71 02 00 71 01 00 71 03 00
;NVIDIA ==> E0 0A 00 E0 0A 02 E0 0A 01 E0 0A 03
;Legacy sensor polling parameter
CP_LSP0 = 83 23 80 80 06 01 00 10 06 07 00
;E0H~EAH
CP_LSP1 = 81 23 80 80 05 01 00 10 07 07 00
;EBH~F5H
CP_LSP2 = 80 23 FF 00 04 07 02 10 00 00 00
;F6H~100H
CP_LSP3 = 00 00 00 00 00 00 00 00 00 00 00
;101~10BH
CP_LSP4 = 00 00 00 00 00 00 00 00 00 00 00
;10CH~116H
CP_LSP5 = 00 00 00 00 00 00 00 00 00 00 00
;117H~121H
CP_LSP6 = 00 00 00 00 00 00 00 00 00 00 00
;122H~12CH
CP_LSP7 = 00 00 00 00 00 00 00 00 00 00 00
;12DH~137H
;UUID
CP_UUID = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
;SYSTEM ID
CP_SYSID = 00 00
CP_EXTENDED_5F = 00
CP_EXTENDED_60 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_80_8B = 9B 8B 14 00 32 00 03 0A 03 0F C8 00
CP_EXTENDED_AA_AD = 00 00 6A 92
CP_EXTENDED_B0_BF = 70 75 62 6C 69 63 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_C0_CF = 00 00 00 00 00 00 00 19 67 F8 00 00 00 1F F0 00
CP_EXTENDED_DC_DF = 7E 00 FF 02
CP_EXTENDED_138_143 = 04 00 00 00 00 40 06 00 01 00 00 00
CP_EXTENDED_194_19F = 00 00 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_1A0 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 EC 10 EC 10 68 81 68 81 00 00 00 00
CP_EXTENDED_1C0 = 00 00 00 00 00 00 00 A2 00 A2 00 67 F8 00 00 00 1F F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00
CP_EXTENDED_1E0 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
;80H~1FFH
VERSION = 1.031

32
external/cache/sources/linuxpg/8168E.map vendored
View File

@ -1,32 +0,0 @@
29 81 EC 10 68 81 EC 10 23 01 04 01 1C 60 00 E0
4C 68 00 01 00 0F C3 FF 14 82 C0 8C 80 02 00 00
11 3C 07 00 10 20 76 76 00 63 01 01 FF 13 AA 03
02 20 99 A5 80 02 00 20 04 40 20 00 04 40 20 3F
00 00 20 B9 6A 98 60 00 0A 00 E0 00 68 4C 00 00
01 00 00 00 AC 6B 75 80 8D 75 7B 01 CA 98 48 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9B 8B 14 00 32 00 03 0A 03 0F C8 00 00 13 72 84
8B 37 C0 A8 00 03 C0 A8 00 0A 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 6A 92 00 00
70 75 62 6C 69 63 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 19 67 F8 00 00 00 1F F0 00
71 00 00 71 02 00 71 01 00 71 03 00 7E 00 FF 02
83 23 80 80 06 01 00 10 06 07 00 81 23 80 80 05
01 00 10 07 07 00 80 23 FF 00 04 07 02 10 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 04 00 00 00 00 40 06 00
01 00 00 00 E2 08 D7 8D C3 BB 0D 10 B1 2B 1E D1
50 CC 67 1C 5B F0 73 98 CC F9 F4 28 99 45 34 B7
69 66 AF 3A 0C C5 2B D5 D0 B4 67 10 87 EB BD 55
9C 4D 35 77 13 F1 3B 6B 50 30 8C FB 3B 16 EF DE
3E 65 4F AA 48 45 51 88 EA 1A D0 22 2C 55 98 49
6F 22 DB 85 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 EC 10 EC 10 68 81 68 81 00 00 00 00
00 00 00 00 00 00 00 A2 00 A2 00 67 F8 00 00 00
1F F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

53
external/cache/sources/linuxpg/8168EEF.cfg vendored
View File

@ -1,53 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
CONFIG1 = 0F
;Asf Disable
CONFIGx = 1C
CONFIG3 = 60
;Asf Enable
;CONFIGx = 5D
;CONFIG3 = E0
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
LEDCFG = 98 CA
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
VERSION = 1.031

48
external/cache/sources/linuxpg/8168EL.cfg vendored
View File

@ -1,48 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
VERSION = 1.031

32
external/cache/sources/linuxpg/8168EL.map vendored
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@ -1,32 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01
01 00 00 00 68 4C E0 00 CA C9 30 FF 18 51 00 18
52 CF 18 53 3C 18 54 60 18 55 14 18 56 82 50 42
C3 FF 40 30 00 FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

51
external/cache/sources/linuxpg/8168ELEF.cfg vendored
View File

@ -1,51 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 1:PHY Disable
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
VERSION = 1.031

78
external/cache/sources/linuxpg/8168EPEF.cfg vendored
View File

@ -1,78 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
;ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Multi Function Configuration.
;Enable Multi function set to 01H, Disable Multi function set to 00H
;MULTIFUN = 01
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;LEDSUBCFG
;Please make sure CONFIGX LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LEDSUBCFG
;BIT 0:LED0 Low Power Enable in D3cold BIT 1:LED1 Low Power Enable in D3cold
;BIT 2:LED2 Low Power Enable in D3cold
;BIT 3:LED0 Preboot Enable BIT 4: LED1 Preboot Enable
;BIT 5:LED2 Preboot Enable
;LEDSUBCFG = 00
;EHCI PMC
;Enable EHCI PME_D3cold & PME_D3hot support in PMC
;Please Do Not program this item if system does not support modern standby.
EHCIPMC = C3 FF
;Secure boot
;SECUREBOOT = 01
VERSION = 1.031

48
external/cache/sources/linuxpg/8168F.cfg vendored
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@ -1,48 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
VERSION = 1.031

32
external/cache/sources/linuxpg/8168F.map vendored
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@ -1,32 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01
01 00 00 00 68 4C E0 00 CA C9 30 FF 18 51 00 18
52 CF 18 53 3C 18 54 60 18 55 14 18 56 82 50 42
C3 FF 40 30 00 FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

49
external/cache/sources/linuxpg/8168FB.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
VERSION = 1.031

32
external/cache/sources/linuxpg/8168FB.map vendored
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@ -1,32 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01
01 00 00 00 68 4C E0 00 CA C9 30 FF 18 51 00 18
52 CF 18 53 3C 18 54 60 18 55 14 18 56 02 50 42
C3 FF 40 30 00 FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

57
external/cache/sources/linuxpg/8168FBEF.cfg vendored
View File

@ -1,57 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 03 00
;PHYANAR = 01 E1
VERSION = 1.031

53
external/cache/sources/linuxpg/8168FEF.cfg vendored
View File

@ -1,53 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
CONFIG0 = 00
CONFIG1 = CF
CONFIGx = 3C
CONFIG3 = 60
CONFIG4 = 14
CONFIG5 = 82
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 8A
PMC = C3 FF
ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 1:PHY Disable
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
VERSION = 1.031

80
external/cache/sources/linuxpg/8168FPEF.cfg vendored
View File

@ -1,80 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;LEDSUBCFG
;Please make sure CONFIGX LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LEDSUBCFG
;BIT 0:LED0 Low Power Enable in D3cold BIT 1:LED1 Low Power Enable in D3cold
;BIT 2:LED2 Low Power Enable in D3cold
;BIT 3:LED0 Preboot Enable BIT 4: LED1 Preboot Enable
;BIT 5:LED2 Preboot Enable
;LEDSUBCFG = 00
;Disable: 00, Enable: 01
;UPS mode power saving
;UPSMODEPWRSAVING = 00
;Secure boot
;SECUREBOOT = 01
;EHCI PMC
;Enable EHCI PME_D3cold & PME_D3hot support in PMC
EHCIPMC = C3 FF
;PCIE Link Capability
;LINKPCIEGEN = 11
;Disable multi-function X
;DISABLEFUNCX = 00
VERSION = 1.031

50
external/cache/sources/linuxpg/8168G.cfg vendored
View File

@ -1,50 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

32
external/cache/sources/linuxpg/8168G.map vendored
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@ -1,32 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01
01 00 00 00 68 4C E0 00 CA C9 30 FF 18 51 00 18
52 CF 18 53 3C 18 54 62 18 55 14 18 56 02 50 42
C3 FF 40 30 00 FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

59
external/cache/sources/linuxpg/8168GEF.cfg vendored
View File

@ -1,59 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable(32pin chip not support) BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;DISFUNCXIOBAR = 00
VERSION = 1.031

49
external/cache/sources/linuxpg/8168GU.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

8
external/cache/sources/linuxpg/8168GU.map vendored
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@ -1,8 +0,0 @@
29 81 00 E0 4C 68 00 02 EC 10 68 81 EC 10 23 01
00 E0 4C 68 00 00 00 01 39 ED 3F FF 40 18 04 19
4C 2A 02 FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

58
external/cache/sources/linuxpg/8168GUEF.cfg vendored
View File

@ -1,58 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;DISFUNCXIOBAR = 00
VERSION = 1.031

49
external/cache/sources/linuxpg/8168H.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 37
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

1
external/cache/sources/linuxpg/8168H.map vendored
View File

@ -1 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01 00 E0 4C 68 00 00 00 01 84 FA 3F FF 19 4C 30 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

65
external/cache/sources/linuxpg/8168HEF.cfg vendored
View File

@ -1,65 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;SpeedUp Capability
;Enable GPHY speed up by MAC set to 29H, Disable GPHY speed up by MAC set to 21H
;PHYPWRFUN = 21
;CTAPSHORT
;Enable set to 01H, Disable set to 00H
;CTAPSHORT = 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

49
external/cache/sources/linuxpg/8168K.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 37
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

8
external/cache/sources/linuxpg/8168K.map vendored
View File

@ -1,8 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01
00 E0 4C 68 00 00 00 01 84 FA 3F FF 19 4C 30 02
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

72
external/cache/sources/linuxpg/8168KB.cfg vendored
View File

@ -1,72 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
VID = 10 EC
DID = 81 62
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;For add-on device, please set CONFIG3 to 60H
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 17
;PMC = C3 FF
;ROMBAR = 00
;LEDXCFG = High-Byte Low-Byte
;LEDX Bit 11: Low power mode enable
;LEDX Bit 10: Preboot enable
;Please make sure CONFIGx LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LED low power mode or LED preboot
;LED0CFG = 02 01
;LED1CFG = 02 02
;LED2CFG = 02 08
;LED3CFG = 02 20
;LED Feature Functions
;Set BIT 0 to 0 : V1 led table.
;Set BIT 0 to 1 : V2 led table.
;BIT 1 to BIT 7 : Reserved
;LEDFEATUREFUNC = 60
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;MDI swap
;MDI non-swap set to 00H, MDI swap set to 20H
;MDISWAP = 00
;Tx polarity swap
;BIT 7: P3 non-swap set to 1, P3 swap set to 0
;BIT 6: P2 non-swap set to 0, P2 swap set to 1
;BIT 5: P1 non-swap set to 1, P1 swap set to 0
;BIT 4: P0 non-swap set to 0, P0 swap set to 1
;BIT 0 to BIT 3 : Reserved
;TXPOLSWAP = A0
;DISFUNCXIOBAR = 00
VERSION = 1.031

77
external/cache/sources/linuxpg/8168KBEF.cfg vendored
View File

@ -1,77 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 62
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
CONFIGx = 3C
;For add-on device, please set CONFIG3 to 60H
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDXCFG = High-Byte Low-Byte
;LEDX Bit 11: Low power mode enable
;LEDX Bit 10: Preboot enable
;Please make sure CONFIGx LED low power bit enabled
;(IO reg offset 0x53 bit 2 set to 0) before modifying LED low power mode or LED preboot
;LED0CFG = 02 01
;LED1CFG = 02 02
;LED2CFG = 02 08
;LED3CFG = 02 20
;LED Feature Functions
;Set BIT 0 to 0 : V1 led table.
;Set BIT 0 to 1 : V2 led table.
;BIT 1 to BIT 7 : Reserved
;LEDFEATUREFUNC = 60
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;MDI swap
;MDI non-swap set to 00H, MDI swap set to 20H
;MDISWAP = 00
;Tx polarity swap
;BIT 7: P3 non-swap set to 1, P3 swap set to 0
;BIT 6: P2 non-swap set to 0, P2 swap set to 1
;BIT 5: P1 non-swap set to 1, P1 swap set to 0
;BIT 4: P0 non-swap set to 0, P0 swap set to 1
;BIT 0 to BIT 3 : Reserved
;TXPOLSWAP = A0
;DISFUNCXIOBAR = 00
VERSION = 1.031

65
external/cache/sources/linuxpg/8168KEF.cfg vendored
View File

@ -1,65 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;SpeedUp Capability
;Enable GPHY speed up by MAC set to 29H, Disable GPHY speed up by MAC set to 21H
;PHYPWRFUN = 21
;CTAPSHORT
;Enable set to 01H, Disable set to 00H
;CTAPSHORT = 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

49
external/cache/sources/linuxpg/8168L.cfg vendored
View File

@ -1,49 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
;CONFIG7 = 37
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

8
external/cache/sources/linuxpg/8168L.map vendored
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@ -1,8 +0,0 @@
29 81 00 E0 4C 68 00 01 EC 10 68 81 EC 10 23 01
00 E0 4C 68 00 00 00 01 84 FA 3F FF 19 4C 30 02
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

65
external/cache/sources/linuxpg/8168LEF.cfg vendored
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@ -1,65 +0,0 @@
NODEID = 00 E0 4C 68 00 01
;ENDID = 00 E0 4C 68 FF FF
;VID = 10 EC
;DID = 81 68
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
;CONFIG0 = 00
;CONFIG1 = CF
;CONFIGx = 3C
;CONFIG3 = 60
;CONFIG4 = 14
;CONFIG5 = 02
;If PXE is enabled, set spi_en (IO reg offset 0x56 bit 3 set to 1) to 1
;CONFIG5 = 0A
CONFIG7 = 07
;PMC = C3 FF
;ROMBAR = 00
;LEDCFG = High-Byte(19H) Low-Byte(18H)
;LEDCFG = 0C A9
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
;PREFETCHABLE = 04
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Second
;Serial Number in PCI Config Space
SN = 00 E0 4C 68 00 00 00 01
;LANCFG
;BIT 0:LAN Disable BIT 1:PHY Disable BIT 2:Link OK
;BIT 31:Clear LANCFG
;LANCFG = 00 00 00 00
;Link Capability
;PHYGBCR = 02 00
;PHYANAR = 01 E1
;SpeedUp Capability
;Enable GPHY speed up by MAC set to 29H, Disable GPHY speed up by MAC set to 21H
;PHYPWRFUN = 21
;CTAPSHORT
;Enable set to 01H, Disable set to 00H
;CTAPSHORT = 01
;DISFUNCXIOBAR = 00
VERSION = 1.031

39
external/cache/sources/linuxpg/8169.cfg vendored
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@ -1,39 +0,0 @@
NODEID = 00 E0 4C 69 00 01
;ENDID = 00 E0 4C 69 FF FF
VID = 10 EC
DID = 81 69
SVID = 10 EC
SMID = 01 23
;Do not change following parameters without Realtek approval
MNGNT = 20
MXLAT = 40
CONFIGx = 01
CONFIG3 = A1
CONFIG0 = 15
CONFIG1 = CD
CONFIG4 = 80
CONFIG5 = 13
PMC = C2 F7
ROMCONF = 3F
;Bit 7-6 Boot Protocol
; 00 ==> PXE protocol
; 01 ==> RPL protocol
;Bit 5-4 Boot order (method)
; 00 ==> ROM disable
; 01 ==> Int 18h
; 10 ==> Int 19h
; 11 ==> PnP/BEV(BBS)
;Bit 3 Show Config Message
; 0 ==> Enable
; 1 ==> Disable
;Bit 2 Shift+F10 Menu Entry
; 0 ==> Enable
; 1 ==> Disable
;Bit 1-0 Show Config Time
; 00 ==> 3 Seconds
; 01 ==> 5 Seconds
; 10 ==> 1 Seconds
; 11 ==> 0 Seconds
VERSION = 1.031

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