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opicm5-tablet: Update dts and add some dt overlays

This commit is contained in:
leeboby 2024-05-27 10:24:18 +08:00 committed by baiywt
parent e7ed6ccb05
commit bacc0fb487
5 changed files with 68 additions and 14 deletions
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3
arch/arm64/boot/dts/rockchip/overlay/Makefile
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@ -9,6 +9,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
rk3588-i2c5-m2.dtbo \
rk3588-i2c5-m3.dtbo \
rk3588-i2c6-m4.dtbo \
rk3588-i2c7-m0.dtbo \
rk3588-i2c8-m2.dtbo \
rk3588-pwm0-m0.dtbo \
rk3588-pwm0-m1.dtbo \
@ -39,6 +40,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
rk3588-uart4-m0.dtbo \
rk3588-uart4-m2.dtbo \
rk3588-uart6-m1.dtbo \
rk3588-uart6-m2.dtbo \
rk3588-uart7-m2.dtbo \
rk3588-uart8-m1.dtbo \
rk3588-can0-m0.dtbo \
@ -75,6 +77,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
rk3588-spi0-m2-cs1-spidev.dtbo \
rk3588-spi0-m2-cs0-cs1-spidev.dtbo \
rk3588-spi1-m1-cs0-spidev.dtbo \
rk3588-spi1-m2-cs0-spidev.dtbo \
rk3588-spi4-m0-cs1-spidev.dtbo \
rk3588-spi4-m1-cs0-spidev.dtbo \
rk3588-spi4-m1-cs1-spidev.dtbo \

14
arch/arm64/boot/dts/rockchip/overlay/rk3588-i2c7-m0.dts Normal file
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@ -0,0 +1,14 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2c8>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c7m0_xfer>;
};
};
};

24
arch/arm64/boot/dts/rockchip/overlay/rk3588-spi1-m2-cs0-spidev.dts Normal file
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@ -0,0 +1,24 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&spi0>;
__overlay__ {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi1m2_cs0 &spi1m2_pins>;
max-freq = <50000000>;
spidev@0 {
compatible = "rockchip,spidev";
status = "okay";
reg = <0>;
spi-max-frequency = <50000000>;
};
};
};
};

13
arch/arm64/boot/dts/rockchip/overlay/rk3588-uart6-m2.dts Normal file
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@ -0,0 +1,13 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&uart6>;
__overlay__ {
status = "okay";
pinctrl-0 = <&uart6m2_xfer>;
};
};
};

28
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-tablet.dts
View File

@ -284,7 +284,7 @@
fan: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm1 0 50000 0>;
pwms = <&pwm15 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
40000 2
@ -1035,10 +1035,16 @@
status = "disabled";
};
&pwm0 {
pinctrl-names = "active";
pinctrl-0 = <&pwm0m1_pins>;
status = "disabled";
};
&pwm1 {
pinctrl-names = "active";
pinctrl-0 = <&pwm1m1_pins>;
status = "okay";
pinctrl-0 = <&pwm1m2_pins>;
status = "disabled";
};
&pwm13 {
@ -1055,8 +1061,8 @@
&pwm15 {
pinctrl-names = "active";
pinctrl-0 = <&pwm15m3_pins>;
status = "disabled";
pinctrl-0 = <&pwm15m2_pins>;
status = "okay";
};
&spi0 {
@ -1066,9 +1072,9 @@
num-cs = <2>;
};
&spi4 {
&spi1 {
status = "disabled";
assigned-clocks = <&cru CLK_SPI4>;
assigned-clocks = <&cru CLK_SPI1>;
assigned-clock-rates = <200000000>;
};
@ -1118,12 +1124,6 @@
pinctrl-0 = <&i2c5m3_xfer>;
};
&i2c8 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c8m2_xfer>;
};
&pwm3 {
status = "disabled";
pinctrl-0 = <&pwm3m3_pins>;
@ -1136,7 +1136,7 @@
&uart6 {
status = "disabled";
pinctrl-0 = <&uart6m1_xfer>;
pinctrl-0 = <&uart6m2_xfer>;
};
&uart7 {