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arm64: dts: rockchip: adjust include file for rk356x board 

Change-Id: I74ff7ae2017bd8e016cbbaec2a51d50412d3090c
Signed-off-by: Liang Chen <cl@rock-chips.com>
This commit is contained in:
Liang Chen 2020-12-04 14:46:49 +08:00 committed by Tao Huang
parent 5a2cf63774
commit caeb5624bb
12 changed files with 20 additions and 103 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/arm64/boot/dts/rockchip/rk3566-evb.dtsi Normal file
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@ -0,0 +1,7 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
#include "rk3568-evb.dtsi"

50
arch/arm64/boot/dts/rockchip/rk3566-evb1-ddr4-v10.dtsi
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@ -7,7 +7,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568-evb.dtsi"
#include "rk3566.dtsi"
#include "rk3566-evb.dtsi"
/ {
model = "Rockchip RK3566 EVB1 DDR4 V10 Board";
@ -101,33 +102,6 @@
pinctrl-0 = <&lcd1_rst_gpio>;
};
&gmac0 {
phy-mode = "rgmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
tx_delay = <0x38>;
rx_delay = <0x2c>;
phy-handle = <&rgmii_phy0>;
status = "okay";
};
/*
* power-supply should switche to vcc3v3_lcd1_n
* when mipi panel is connected to dsi1.
@ -150,13 +124,6 @@
status = "disabled";
};
&mdio0 {
rgmii_phy0: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&mipi_dphy0 {
status = "okay";
};
@ -194,19 +161,6 @@
pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
};
&usbdrd_dwc3 {
dr_mode = "otg";
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
status = "okay";
};
&usbdrd30 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;

16
arch/arm64/boot/dts/rockchip/rk3566-evb2-lp4x-v10.dtsi
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@ -8,7 +8,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568-evb.dtsi"
#include "rk3566.dtsi"
#include "rk3566-evb.dtsi"
/ {
model = "Rockchip RK3566 EVB2 LP4X V10 Board";
@ -364,19 +365,6 @@
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
};
&usbdrd_dwc3 {
dr_mode = "otg";
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
status = "okay";
};
&usbdrd30 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;

20
arch/arm64/boot/dts/rockchip/rk3566-evb3-ddr3-v10.dtsi
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@ -8,7 +8,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568-evb.dtsi"
#include "rk3566.dtsi"
#include "rk3566-evb.dtsi"
/ {
model = "Rockchip RK3566 EVB3 DDR3 V10 Board";
@ -214,10 +215,6 @@
};
};
&sata2 {
status = "okay";
};
&sdio_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk809 1>;
@ -262,19 +259,6 @@
status = "okay";
};
&usbdrd_dwc3 {
dr_mode = "otg";
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
status = "okay";
};
&usbdrd30 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;

5
arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts
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@ -11,7 +11,7 @@
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include "rk3568.dtsi"
#include "rk3566.dtsi"
#include "rk3568-android.dtsi"
/ {
@ -933,9 +933,6 @@
};
&usbdrd_dwc3 {
dr_mode = "otg";
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
status = "okay";
};

7
arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-k108.dts
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@ -11,7 +11,7 @@
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include "rk3568.dtsi"
#include "rk3566.dtsi"
#include "rk3568-android.dtsi"
/ {
@ -1224,11 +1224,6 @@
};
&usbdrd_dwc3 {
dr_mode = "otg";
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
status = "okay";
};

7
arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-rkg11.dts Executable file → Normal file
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@ -11,7 +11,7 @@
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include "rk3568.dtsi"
#include "rk3566.dtsi"
#include "rk3568-android.dtsi"
/ {
@ -1077,11 +1077,6 @@
};
&usbdrd_dwc3 {
dr_mode = "otg";
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
status = "okay";
};

7
arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet.dts
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@ -11,7 +11,7 @@
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include "rk3568.dtsi"
#include "rk3566.dtsi"
#include "rk3568-android.dtsi"
/ {
@ -1135,11 +1135,6 @@
};
&usbdrd_dwc3 {
dr_mode = "otg";
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
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@ -4,7 +4,6 @@
*
*/
#include "rk3568.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>

1
arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
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@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568.dtsi"
#include "rk3568-evb.dtsi"
#include "rk3568-android.dtsi"

1
arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10.dtsi
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@ -6,6 +6,7 @@
/dts-v1/;
#include "rk3568.dtsi"
#include "rk3568-evb.dtsi"
/ {

1
arch/arm64/boot/dts/rockchip/rk3568-iotest-ddr3-v10.dts
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@ -6,6 +6,7 @@
/dts-v1/;
#include "rk3568.dtsi"
#include "rk3568-evb.dtsi"
#include "rk3568-android.dtsi"