arm64: dts: rockchip: Add dts for Orange Pi CM4/3B

This commit is contained in:
baiywt 2023-03-09 21:28:06 +08:00
parent 7103c96083
commit f52a614fc2
20 changed files with 3401 additions and 2 deletions

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@ -1,5 +1,7 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-orangepi-cm4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-orangepi-3b.dtb
subdir-y := $(dts-dirs) overlay

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@ -69,10 +69,26 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
rk3588-spi4-m1-cs0-cs1-spidev.dtbo \
rk3588-spi4-m2-cs0-spidev.dtbo \
rk3588-disable-led.dtbo \
rk3588-opi5plus-disable-leds.dtbo
rk3588-opi5plus-disable-leds.dtbo \
rk356x-edp.dtbo \
rk356x-opi3b-edp.dtbo \
rk356x-i2c2-m1.dtbo \
rk356x-i2c3-m0.dtbo \
rk356x-i2c4-m0.dtbo \
rk356x-raspi-7inch-touchscreen.dtbo \
rk356x-raspi-7inch-touchscreen-dsi0.dtbo \
rk356x-spi3-m0-cs0-spidev.dtbo \
rk356x-uart3-m0.dtbo \
rk356x-uart7-m2.dtbo \
rk356x-uart9-m2.dtbo \
rk356x-pwm11-m1.dtbo \
rk356x-pwm7.dtbo \
rk356x-ov5647-c1.dtbo \
rk356x-ov5647-c2.dtbo
scr-$(CONFIG_ARCH_ROCKCHIP) += \
rk3588-fixup.scr
rk3588-fixup.scr \
rk356x-fixup.scr
dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
README.rockchip-overlays

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@ -0,0 +1,200 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/rockchip_vop.h>
/ {
fragment@0 {
target-path = "/";
__overlay__ {
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm2 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
edp-panel {
status = "okay";
compatible = "simple-panel";
backlight = <&backlight>;
prepare-delay-ms = <120>;
enable-delay-ms = <120>;
unprepare-delay-ms = <120>;
disable-delay-ms = <120>;
display-timings {
native-mode = <&edp_timing>;
edp_timing: timing0 {
clock-frequency = <125000000>;
hactive = <1920>;
vactive = <1080>;
hback-porch = <180>;
hfront-porch = <120>;
vback-porch = <10>;
vfront-porch = <10>;
hsync-len = <20>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
port {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
};
};
fragment@1 {
target = <&edp>;
__overlay__ {
status = "okay";
force-hpd;
hpd-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&edp_hpd &bl_en>;
ports {
port@1 {
reg = <1>;
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};
};
fragment@2 {
target = <&edp_phy>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&edp_in_vp0>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&edp_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@5 {
target = <&route_edp>;
__overlay__ {
status = "disabled";
};
};
fragment@6 {
target = <&pwm2>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&pinctrl>;
__overlay__ {
edp {
edp_hpd: edp-hpd {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
bl_en: bl-en {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};
};
fragment@8 {
target = <&hdmi>;
__overlay__ {
status = "disabled";
};
};
// fragment@7 {
// target = <&vp1>;
// __overlay__ {
// //rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 <<
// //ROCKCHIP_VOP2_SMART1)>;
// //rockchip,primary-plane = <ROCKCHIP_VOP2_SMART1>;
// rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ROCKCHIP_VOP2_SMART0)>;
// rockchip,primary-plane = <ROCKCHIP_VOP2_SMART0>;
// cursor-win-id = <ROCKCHIP_VOP2_CLUSTER0>;
// };
// };
//
// fragment@8 {
// target = <&vp0>;
// __overlay__ {
// rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_SMART1)>;
// rockchip,primary-plane = <ROCKCHIP_VOP2_SMART1>;
// //rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 <<
// //ROCKCHIP_VOP2_SMART0)>;
// //rockchip,primary-plane = <ROCKCHIP_VOP2_SMART0>;
// cursor-win-id = <ROCKCHIP_VOP2_CLUSTER1>;
// };
// };
};

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@ -0,0 +1,62 @@
# overlays fixup script
# implements (or rather substitutes) overlay arguments functionality
# using u-boot scripting, environment variables and "fdt" command
#setenv decompose_pin 'setexpr tmp_pinctrl sub "GPIO(0|1|2|3|4)_\\S\\d+" "\\1";
#setexpr tmp_bank sub "GPIO\\d_(\\S)\\d+" "\\1";
#test "${tmp_bank}" = "A" && setenv tmp_bank 0;
#test "${tmp_bank}" = "B" && setenv tmp_bank 1;
#test "${tmp_bank}" = "C" && setenv tmp_bank 2;
#test "${tmp_bank}" = "D" && setenv tmp_bank 3;
#setexpr tmp_pin sub "GPIO\\d_\\S(\\d+)" "\\1";
#setexpr tmp_bank ${tmp_bank} * 8;
#setexpr tmp_pin ${tmp_bank} + ${tmp_pin}'
#
#
#if test -n "${param_spinor_spi_bus}"; then
# test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@ff1c0000"
# test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@ff1d0000"
# test "${param_spinor_spi_bus}" = "2" && setenv tmp_spi_path "spi@ff1e0000"
# test "${param_spinor_spi_bus}" = "3" && setenv tmp_spi_path "spi@ff1f0000"
# fdt set /${tmp_spi_path} status "okay"
# fdt set /${tmp_spi_path}/spiflash@0 status "okay"
# if test -n "${param_spinor_max_freq}"; then
# fdt set /${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>"
# fi
# if test "${param_spinor_spi_cs}" = "1"; then
# fdt set /${tmp_spi_path}/spiflash@0 reg "<1>"
# fi
# env delete tmp_spi_path
#fi
#
#if test -n "${param_spidev_spi_bus}"; then
# test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@ff1c0000"
# test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@ff1d0000"
# test "${param_spidev_spi_bus}" = "2" && setenv tmp_spi_path "spi@ff1e0000"
# test "${param_spidev_spi_bus}" = "3" && setenv tmp_spi_path "spi@ff1f0000"
# fdt set /${tmp_spi_path} status "okay"
# fdt set /${tmp_spi_path}/spidev status "okay"
# if test -n "${param_spidev_max_freq}"; then
# fdt set /${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
# fi
# if test "${param_spidev_spi_cs}" = "1"; then
# fdt set /${tmp_spi_path}/spidev reg "<1>";
# fi
#fi
#
#if test -n "${param_w1_pin}"; then
# setenv tmp_pinctrl "${param_w1_pin}"
# setenv tmp_bank "${param_w1_pin}"
# setenv tmp_pin "${param_w1_pin}"
# run decompose_pin
# #echo "${param_w1_pin} ---> pinctrl = ${tmp_pinctrl}"
# #echo "${param_w1_pin} ---> bank = ${tmp_bank}"
# #echo "${param_w1_pin} ---> pin = ${tmp_pin}"
# fdt get value tmp_pinctrl /__symbols__ gpio${tmp_pinctrl}
# #echo "${param_w1_pin} ---> tmp_pinctrl = ${tmp_pinctrl}"
# fdt get value tmp_phandle ${tmp_pinctrl} phandle
# #echo "${param_w1_pin} ---> tmp_phandle = ${tmp_phandle}"
# fdt set /onewire@0 gpios "<${tmp_phandle} 0x000000${tmp_pin} 0 0>"
# env delete tmp_pinctrl tmp_bank tmp_pin tmp_phandle
#fi
#

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@ -0,0 +1,14 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2c2>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2m1_xfer>;
};
};
};

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@ -0,0 +1,14 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2c3>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c3m0_xfer>;
};
};
};

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@ -0,0 +1,14 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2c4>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
};
};
};

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@ -0,0 +1,200 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/rockchip_vop.h>
/ {
fragment@0 {
target-path = "/";
__overlay__ {
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm2 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
edp-panel {
status = "okay";
compatible = "simple-panel";
backlight = <&backlight>;
prepare-delay-ms = <120>;
enable-delay-ms = <120>;
unprepare-delay-ms = <120>;
disable-delay-ms = <120>;
display-timings {
native-mode = <&edp_timing>;
edp_timing: timing0 {
clock-frequency = <125000000>;
hactive = <1920>;
vactive = <1080>;
hback-porch = <180>;
hfront-porch = <120>;
vback-porch = <10>;
vfront-porch = <10>;
hsync-len = <20>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
port {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
};
};
fragment@1 {
target = <&edp>;
__overlay__ {
status = "okay";
force-hpd;
hpd-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&edp_hpd &bl_en>;
ports {
port@1 {
reg = <1>;
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};
};
fragment@2 {
target = <&edp_phy>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&edp_in_vp0>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&edp_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@5 {
target = <&route_edp>;
__overlay__ {
status = "disabled";
};
};
fragment@6 {
target = <&pwm2>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&pinctrl>;
__overlay__ {
edp {
edp_hpd: edp-hpd {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
bl_en: bl-en {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};
};
fragment@8 {
target = <&hdmi>;
__overlay__ {
status = "disabled";
};
};
// fragment@7 {
// target = <&vp1>;
// __overlay__ {
// //rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 <<
// //ROCKCHIP_VOP2_SMART1)>;
// //rockchip,primary-plane = <ROCKCHIP_VOP2_SMART1>;
// rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ROCKCHIP_VOP2_SMART0)>;
// rockchip,primary-plane = <ROCKCHIP_VOP2_SMART0>;
// cursor-win-id = <ROCKCHIP_VOP2_CLUSTER0>;
// };
// };
//
// fragment@8 {
// target = <&vp0>;
// __overlay__ {
// rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_SMART1)>;
// rockchip,primary-plane = <ROCKCHIP_VOP2_SMART1>;
// //rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 <<
// //ROCKCHIP_VOP2_SMART0)>;
// //rockchip,primary-plane = <ROCKCHIP_VOP2_SMART0>;
// cursor-win-id = <ROCKCHIP_VOP2_CLUSTER1>;
// };
// };
};

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@ -0,0 +1,116 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
/ {
fragment@0 {
target = <&i2c1>;
__overlay__ {
status = "okay";
ov5647: ov5647@36 {
status = "okay";
compatible = "ovti,ov5647";
reg = <0x36>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "TongJu";
rockchip,camera-module-lens-name = "CHT842-MD";
port {
ov5647_out: endpoint {
remote-endpoint = <&dphy1_in>;
data-lanes = <1 2>;
};
};
};
};
};
fragment@1 {
target = <&csi2_dphy0>;
__overlay__ {
status = "disabled";
};
};
fragment@2 {
target = <&csi2_dphy1>;
__overlay__ {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dphy1_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&ov5647_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy1_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp0_in>;
};
};
};
};
};
fragment@4 {
target = <&csi2_dphy_hw>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&rkisp>;
__overlay__ {
status = "okay";
};
};
fragment@6 {
target = <&rkisp_mmu>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&rkisp_vir0>;
__overlay__ {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dphy1_out>;
};
};
};
};
};

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@ -0,0 +1,196 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
/ {
fragment@0 {
target = <&i2c3>;
__overlay__ {
ov5647_1: ov5647@36 {
status = "okay";
compatible = "ovti,ov5647";
reg = <0x36>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "TongJu";
rockchip,camera-module-lens-name = "CHT842-MD";
port {
ov5647_out1: endpoint {
remote-endpoint = <&dphy2_in>;
data-lanes = <1 2>;
};
};
};
};
};
fragment@1 {
target = <&csi2_dphy0>;
__overlay__ {
status = "disabled";
};
};
fragment@2 {
target = <&csi2_dphy2>;
__overlay__ {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dphy2_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&ov5647_out1>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy2_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&mipi_csi2_input>;
};
};
};
};
};
fragment@4 {
target = <&csi2_dphy_hw>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&mipi_csi2>;
__overlay__ {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&dphy2_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
data-lanes = <1 2>;
};
};
};
};
};
fragment@6 {
target = <&rkcif_mipi_lvds>;
__overlay__ {
status = "okay";
port {
cif_mipi_in: endpoint {
remote-endpoint = <&mipi_csi2_output>;
data-lanes = <1 2>;
};
};
};
};
fragment@7 {
target = <&rkcif_mipi_lvds_sditf>;
__overlay__ {
status = "okay";
port {
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp1_in>;
data-lanes = <1 2>;
};
};
};
};
fragment@8 {
target = <&rkisp>;
__overlay__ {
status = "okay";
};
};
fragment@9 {
target = <&rkisp_mmu>;
__overlay__ {
status = "okay";
};
};
fragment@10 {
target = <&rkisp_vir1>;
__overlay__ {
status = "okay";
port {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
isp1_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
};
fragment@11 {
target = <&rkcif>;
__overlay__ {
status = "okay";
};
};
fragment@12 {
target = <&rkcif_mmu>;
__overlay__ {
status = "okay";
};
};
};

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@ -0,0 +1,13 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&pwm11>;
__overlay__ {
status = "okay";
pinctrl-0 = <&pwm11m1_pins>;
};
};
};

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@ -0,0 +1,12 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&pwm7>;
__overlay__ {
status = "okay";
};
};
};

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@ -0,0 +1,108 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/display/rockchip_vop.h>
/ {
fragment@0 {
target = <&dsi0>;
__overlay__ {
status = "okay";
ports {
port@1 {
reg = <1>;
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi0>;
};
};
};
};
};
fragment@1 {
target = <&i2c3>;
__overlay__ {
status = "okay";
raspits_panel_1: raspits-panel@45 {
compatible = "raspberrypi,7inch-touchscreen-panel";
reg = <0x45>;
port {
panel_in_dsi0: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
raspits_touch_ft5426_1: raspits-touch-ft5426@38 {
compatible = "raspits_ft5426";
reg = <0x38>;
};
};
};
fragment@2 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&dsi0_in_vp0>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi0_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@5 {
target = <&route_dsi0>;
__overlay__ {
status = "disabled";
};
};
fragment@6 {
target = <&hdmi>;
__overlay__ {
status = "disabled";
};
};
// fragment@6 {
// target = <&vp0>;
// __overlay__ {
// rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 <<
// ROCKCHIP_VOP2_SMART1)>;
// rockchip,primary-plane = <ROCKCHIP_VOP2_SMART1>;
// cursor-win-id = <ROCKCHIP_VOP2_CLUSTER1>;
// };
// };
//
// fragment@7 {
// target = <&vp1>;
// __overlay__ {
// rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 <<
// ROCKCHIP_VOP2_SMART0)>;
// rockchip,primary-plane = <ROCKCHIP_VOP2_SMART0>;
// cursor-win-id = <ROCKCHIP_VOP2_CLUSTER0>;
// };
// };
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/display/rockchip_vop.h>
/ {
fragment@0 {
target = <&dsi1>;
__overlay__ {
status = "okay";
ports {
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
};
fragment@1 {
target = <&i2c1>;
__overlay__ {
status = "okay";
raspits_panel: raspits-panel@45 {
compatible = "raspberrypi,7inch-touchscreen-panel";
reg = <0x45>;
port {
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
raspits_touch_ft5426: raspits-touch-ft5426@38 {
compatible = "raspits_ft5426";
reg = <0x38>;
};
};
};
fragment@2 {
target = <&video_phy1>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&dsi1_in_vp0>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&dsi1_in_vp1>;
__overlay__ {
status = "disabled";
};
};
fragment@5 {
target = <&route_dsi1>;
__overlay__ {
status = "disabled";
};
};
fragment@6 {
target = <&hdmi>;
__overlay__ {
status = "disabled";
};
};
// fragment@6 {
// target = <&vp0>;
// __overlay__ {
// rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 <<
// ROCKCHIP_VOP2_SMART1)>;
// rockchip,primary-plane = <ROCKCHIP_VOP2_SMART1>;
// cursor-win-id = <ROCKCHIP_VOP2_CLUSTER1>;
// };
// };
//
// fragment@7 {
// target = <&vp1>;
// __overlay__ {
// rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 <<
// ROCKCHIP_VOP2_SMART0)>;
// rockchip,primary-plane = <ROCKCHIP_VOP2_SMART0>;
// cursor-win-id = <ROCKCHIP_VOP2_CLUSTER0>;
// };
// };
};

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/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&spi3>;
__overlay__ {
status = "okay";
spidev@0 {
compatible = "rockchip,spidev";
status = "okay";
reg = <0>;
spi-max-frequency = <50000000>;
};
};
};
};

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/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&uart3>;
__overlay__ {
status = "okay";
pinctrl-0 = <&uart3m0_xfer>;
};
};
};

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/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&uart7>;
__overlay__ {
status = "okay";
pinctrl-0 = <&uart7m2_xfer>;
};
};
};

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/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&uart9>;
__overlay__ {
status = "okay";
pinctrl-0 = <&uart9m2_xfer>;
};
};
};

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