OrangePi_CM5

Commit Graph

Author	SHA1	Message	Date
Christoph Hellwig	a535bb8010	unicore32: make dma_cache_sync a no-op unicore32 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't make any sense to do any work in dma_cache_sync given that it must be a no-op when dma_alloc_attrs returns coherent memory. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>	2017-10-19 16:37:36 +02:00
GuanXuetao	10c9c10c31	unicore32 core architecture: mm related: consistent device DMA handling This patch implements consistent device DMA handling of memory management. DMA device operations are also here. Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Reviewed-by: Arnd Bergmann <arnd@arndb.de>	2011-03-17 09:19:09 +08:00

Author

SHA1

Message

Date

Christoph Hellwig

a535bb8010

unicore32: make dma_cache_sync a no-op

unicore32 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
doesn't make any sense to do any work in dma_cache_sync given that it
must be a no-op when dma_alloc_attrs returns coherent memory.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>

2017-10-19 16:37:36 +02:00

GuanXuetao

10c9c10c31

unicore32 core architecture: mm related: consistent device DMA handling

This patch implements consistent device DMA handling of memory management.
DMA device operations are also here.

Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>

2011-03-17 09:19:09 +08:00

2 Commits