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8 Commits

Author SHA1 Message Date
Caesar Wang e31f1b672c arm64: dts: rockchip: use SPDX-License-Identifier 
Update all 64bit rockchip devicetree files to use SPDX-License-Identifiers.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Ie983cca0d54cae8b5ad6d322d51eb7bbd265aa0a
 2022-08-01 14:20:46 +08:00
Elaine Zhang 4a90327b81 arm64: dts: rockchip: Improve the aclk_cci frequency for rk3399 
The initialization frequency of cci was adjusted from 300M to 600M.

Change-Id: I36ea20ec84c97f893894687ce4eb7bd021d372a0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2020-03-19 17:36:15 +08:00
Elaine Zhang 2e5468ac45 arm64: dts: rockchip: Improve the aclk_perilp0 frequency for rk3399 
To improve the performance of dual USB transmission.

Change-Id: Ie20d17029e54d299cddadc7a286d9bf6c96b0fbb
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2018-08-28 11:07:05 +08:00
Elaine Zhang a8cf408589 ARM64: dts: rockchip: rk3399: assigned clk_uart4_src parent to PPLL 
clk_uart4_src default parent is 24M,does not satisfy the
fractional divider must set that denominator is 20 times
larger than numerator.

Change-Id: I21fd9866794e052414a6fdf1d64840ac2a0bb8f2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2017-09-20 10:29:37 +08:00
Elaine Zhang 21b4bfc5aa arm64: dts: rockchip: rk3399: add aclk/hclk_vop init freq 
to fix up the display error when no uboot logo show.

Change-Id: I6227391a3c0d015a5fa6ae916d849659d5957077
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2017-03-24 18:36:07 +08:00
Elaine Zhang e9fd218be3 arm64: dts: rockchip: rk3399: remove some unnecessary assigned-clocks node 
keep aclk_vop hclk_vop freq the same as uboot,
to slove shaking for uboot logo to kernel show.

Change-Id: Id0b86fc583024482f16f40b2f1ec6f9189eac160
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2017-03-22 16:22:05 +08:00
Elaine Zhang 19c26002e1 ARM64: dts: rockchip: rk3399: change the pll init freq 
set npll init freq 600M
set gpll init freq 800M

Change-Id: I110cc4b4051504dd875712bce9e473f74d8578b4
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2017-03-08 16:31:30 +08:00
Elaine Zhang a997cb77e7 arm64: dts: rockchip: clk: rk3399: reparent some clks parent 
1.reparent vop's parent to vpll which vop is for hdmi.
2.reparent the other vop to cpll.
3.reparent others clk and set clk rate,
  to slove some clks is dummy.

attention:
if the vopb is for hdmi,the vopb parent clk must be vpll
and the vopl parent clk is cpll or others plls.
if the vopl is for hdmi,the vopl parent clk must be vpll
and the vopb parent clk is cpll or other plls.

Change-Id: Ibfd05172c93f885f66deea9cec64d64e22174078
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2017-01-05 08:58:51 +08:00