Add a new dtsi file - rk3399-opp.dtsi, to configure opp-tables
for cpu, gpu and dmc.
Add rk3399-early-opp.dtsi for board with ES1, which need limit
frequency for cpu, gpu and dmc.
Change-Id: Ib57761fd5f405b0e79039d7a01e6e023d6f5dc2c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
stress test:
1. Antutu, use governor simpleondemand
2. Need for Speed, use governor simpleondemand
3. Glmark2, use userspace, scanning frequency
Change-Id: Ibe27380e582b193d900b0d55da3567ce553c32df
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
From the measured data, the voltage can be reduced a little if pvtm
is greater than 161000.
Change-Id: Icac965ff31d4ed37ae1f40204037a57b7cdf8ba1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
It is better to make the voltage greater than 810mV and it will be more
stable.
Change-Id: I4f9294a0629a8c3b83e930f0dec20d939130070d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
As gpu clock sources had been changed, the gpu frequencies also
should modifiy.
1. 297MHz is not support and replace it with 300MHz.
2. If enable tow vops, 500MHz is not support,
so remove it from the default table.
Change-Id: If2a653571f0222e895f7df825eeb8ae43ce99332
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Only 200MHz, 300MHz, 400MHz, 528MHz, 600MHz, 666MHz, 732MHz and
800MHz are available at present.
Change-Id: I3a376b389fe6b06b3b32f0c695de2cbde05dfeea
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Single entry is for target voltage and three entries are for
<target min max> voltages. Change cpu opp-microvolt form one entry to
three entries and set maximum acceptable voltage to a high value so that
regulator device can supply multiple consumers at the same time.
Change-Id: I3a0dc4e161bae33e36b232c36a0a05a3102359ef
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
stress test:
1. Antutu, use governor simpleondemand
2. Need for Speed, use governor simpleondemand
3. Glmark2, use userspace, scanning frequency
Change-Id: Ibe27380e582b193d900b0d55da3567ce553c32df
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Compiling the DT file with W=1, DTC warns like follows:
Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property
Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
Change-Id: I5748be7888db149633c3980c3f5e9715cd256a52
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Only 200MHz, 300MHz, 400MHz, 528MHz, 600MHz, 666MHz, 732MHz and
800MHz are available at present.
Change-Id: I48ed7e6e6f636389fbc239b1cca201f5c5f19d7a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
It would be better to name OPP nodes as opp@<opp-hz> as that will ensure
that multiple DT nodes don't contain the same frequency. Of course we
expect the writer to name the node with its opp-hz frequency and not any
other frequency.
And that will let the compile error out if multiple nodes are using the
same opp-hz frequency.
Change-Id: I8c77646329e39390fb135d4d75d34893a8168876
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Add a new dtsi file - rk3399-opp.dtsi, to configure opp-tables
for cpu, gpu and dmc.
Add rk3399-early-opp.dtsi for board with ES1, which need limit
frequency for cpu, gpu and dmc.
Change-Id: Ib57761fd5f405b0e79039d7a01e6e023d6f5dc2c
Reviewed-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Huang, Tao <huangtao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
The opp who contains a opp-suspend property will be configured
during suspend or reboot.
Change-Id: I6b2eede43216435f568db6959127a6e84c8cd4c8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Update all 64bit rockchip devicetree files to use SPDX-License-Identifiers.
All devicetrees claim to be either GPL or X11 while the actual license
text is MIT. Therefore we use MIT for the SPDX tag as X11 is clearly
wrong.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Brian Norris <briannorris@chromium.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add Mali GPU device tree node for the RK3399 SoCs, with devfreq
opp table.
RK3399 and RK3399-OP1 SoCs have a different recommendation table with
gpu opp. Also, the ARM's mali driver found on
https://developer.arm.com/products/software/mali-drivers/midgard-kernel.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rk3399 has multiple variants with different frequency ratings.
The operating points currently in the kernel stem from the op1 variant
used in Gru ChromeOS devices and may not be suitable for general rk3399
chips. Therefore bring it back to the official general operating points.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Used for Gru/Kevin only, as they're the only ones which have a described
CPU regulator. Also, I'm not sure we've validated this table non-Gru
boards.
At the same time, partially describe PWM regulators for Gru, so cpufreq
doesn't think it can crank up the clock speed without changing the
voltage. However, we don't yet have the DT bindings to fully describe
the Over Voltage Protection (OVP) circuits on these boards. Without that
description, we might end up changing the voltage too much, too fast.
Add the pwm-regulator descriptions and associate the CPU OPPs, but leave
them disabled.
Signed-off-by: Brian Norris <briannorris@chromium.org>
[shared gru/kevin parts on a gru device]
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
[with a bit of reordering]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Finley Xiao