OrangePi_CM5/drivers/gpu
Mika Kahola 26a91555bd drm/i915: DVO pixel clock check
It is possible the we request to have a mode that has
higher pixel clock than our HW can support. This patch
checks if requested pixel clock is lower than the one
supported by the HW. The requested mode is discarded
if we cannot support the requested pixel clock.

This patch applies to DVO.

V2:
- removed computation for max pixel clock

V3:
- cleanup by removing unnecessary lines

V4:
- clock check against max dotclock moved inside 'if (fixed_mode)'

V5:
- dot clock check against fixed_mode clock when available

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-08-26 10:29:20 +02:00
..
drm drm/i915: DVO pixel clock check 2015-08-26 10:29:20 +02:00
host1x gpu: host1x: Export host1x_syncpt_read() 2015-04-02 18:46:20 +02:00
ipu-v3 GPU: ipu: fix lockup caused by pending chained interrupts 2015-07-10 11:02:46 +02:00
vga Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2014-10-13 16:23:15 +02:00
Makefile gpu: host1x: Provide a proper struct bus_type 2015-01-27 10:09:14 +01:00