4595 lines
184 KiB
Plaintext
4595 lines
184 KiB
Plaintext
/dts-v1/;
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// magic: 0xd00dfeed
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// totalsize: 0x17fef (98287)
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// off_dt_struct: 0x88
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// off_dt_strings: 0x15740
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// off_mem_rsvmap: 0x28
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// version: 17
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// last_comp_version: 16
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// boot_cpuid_phys: 0x0
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// size_dt_strings: 0x28af
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// size_dt_struct: 0x156b8
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/memreserve/ 0x40020000 0x800;
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/memreserve/ 0x48000000 0x1000000;
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/memreserve/ 0x48100000 0x4000;
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/memreserve/ 0x48104000 0x1000;
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/memreserve/ 0x48105000 0x1000;
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/ {
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model = "sun50iw6";
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compatible = "arm,sun50iw6p1";
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interrupt-parent = <0x00000001>;
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#address-cells = <0x00000002>;
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#size-cells = <0x00000002>;
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clocks {
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compatible = "allwinner,clk-init";
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device_type = "clocks";
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#address-cells = <0x00000002>;
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#size-cells = <0x00000002>;
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ranges;
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reg = <0x00000000 0x03001000 0x00000000 0x00001000 0x00000000 0x07010000 0x00000000 0x00000400 0x00000000 0x07000000 0x00000000 0x00000004>;
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losc {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <0x00008000>;
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clock-output-names = "losc";
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linux,phandle = <0x00000015>;
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phandle = <0x00000015>;
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};
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iosc {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <0x00f42400>;
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clock-output-names = "iosc";
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linux,phandle = <0x00000016>;
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phandle = <0x00000016>;
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};
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hosc {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <0x016e3600>;
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clock-output-names = "hosc";
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linux,phandle = <0x00000007>;
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phandle = <0x00000007>;
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};
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osc48m {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-clock";
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clock-frequency = <0x02dc6c00>;
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clock-output-names = "osc48m";
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linux,phandle = <0x00000008>;
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phandle = <0x00000008>;
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};
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pll_cpu {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_cpu";
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linux,phandle = <0x000000d7>;
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phandle = <0x000000d7>;
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};
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pll_ddr0 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_ddr0";
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linux,phandle = <0x000000de>;
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phandle = <0x000000de>;
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};
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pll_periph0 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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assigned-clock-rates = <0x23c34600>;
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lock-mode = "new";
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clock-output-names = "pll_periph0";
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linux,phandle = <0x00000002>;
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phandle = <0x00000002>;
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};
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pll_periph1 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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assigned-clock-rates = <0x23c34600>;
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lock-mode = "new";
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clock-output-names = "pll_periph1";
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linux,phandle = <0x00000003>;
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phandle = <0x00000003>;
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};
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pll_gpu {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_gpu";
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linux,phandle = <0x000000e0>;
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phandle = <0x000000e0>;
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};
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pll_video0 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_video0";
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linux,phandle = <0x00000005>;
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phandle = <0x00000005>;
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};
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pll_video1 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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assigned-clock-rates = <0x2367b880>;
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clock-output-names = "pll_video1";
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linux,phandle = <0x00000006>;
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phandle = <0x00000006>;
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};
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pll_ve {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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device_type = "clk_pll_ve";
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lock-mode = "new";
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clock-output-names = "pll_ve";
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linux,phandle = <0x0000001f>;
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phandle = <0x0000001f>;
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};
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pll_de {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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assigned-clock-rates = <0x297c1e00>;
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lock-mode = "new";
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clock-output-names = "pll_de";
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linux,phandle = <0x00000009>;
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phandle = <0x00000009>;
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};
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pll_hsic {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_hsic";
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linux,phandle = <0x00000047>;
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phandle = <0x00000047>;
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};
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pll_audio {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,pll-clock";
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lock-mode = "new";
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clock-output-names = "pll_audio";
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linux,phandle = <0x00000004>;
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phandle = <0x00000004>;
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};
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pll_periph0x2 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000002>;
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clock-mult = <0x00000002>;
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clock-div = <0x00000001>;
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clock-output-names = "pll_periph0x2";
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linux,phandle = <0x00000023>;
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phandle = <0x00000023>;
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};
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pll_periph0x4 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000002>;
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clock-mult = <0x00000004>;
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clock-div = <0x00000001>;
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clock-output-names = "pll_periph0x4";
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};
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periph32k {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000002>;
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clock-mult = <0x00000002>;
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clock-div = <0x00008f0d>;
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clock-output-names = "periph32k";
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};
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pll_periph1x2 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000003>;
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clock-mult = <0x00000002>;
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clock-div = <0x00000001>;
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clock-output-names = "pll_periph1x2";
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linux,phandle = <0x0000007b>;
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phandle = <0x0000007b>;
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};
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pll_audiox4 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000004>;
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clock-mult = <0x00000004>;
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clock-div = <0x00000001>;
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clock-output-names = "pll_audiox4";
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};
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pll_audiox2 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000004>;
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clock-mult = <0x00000002>;
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clock-div = <0x00000001>;
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clock-output-names = "pll_audiox2";
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};
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pll_video0x4 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000005>;
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clock-mult = <0x00000004>;
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clock-div = <0x00000001>;
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clock-output-names = "pll_video0x4";
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};
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pll_video1x4 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000006>;
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clock-mult = <0x00000004>;
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clock-div = <0x00000001>;
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clock-output-names = "pll_video1x4";
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};
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hoscd2 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000007>;
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clock-mult = <0x00000001>;
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clock-div = <0x00000002>;
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clock-output-names = "hoscd2";
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};
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osc48md4 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000008>;
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clock-mult = <0x00000001>;
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clock-div = <0x00000004>;
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clock-output-names = "osc48md4";
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linux,phandle = <0x00000041>;
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phandle = <0x00000041>;
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};
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pll_periph0d6 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,fixed-factor-clock";
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clocks = <0x00000002>;
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clock-mult = <0x00000001>;
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clock-div = <0x00000006>;
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clock-output-names = "pll_periph0d6";
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};
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cpu {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "cpu";
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};
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axi {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "axi";
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};
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cpuapb {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "cpuapb";
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};
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psi {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "psi";
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};
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ahb1 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "ahb1";
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};
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ahb2 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "ahb2";
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};
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ahb3 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "ahb3";
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};
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apb1 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "apb1";
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};
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apb2 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "apb2";
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linux,phandle = <0x000000ae>;
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phandle = <0x000000ae>;
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};
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mbus {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "mbus";
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};
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de {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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assigned-clock-parents = <0x00000009>;
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assigned-clock-rates = <0x297c1e00>;
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assigned-clocks = <0x0000000a>;
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clock-output-names = "de";
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linux,phandle = <0x0000000a>;
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phandle = <0x0000000a>;
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};
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di {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "di";
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linux,phandle = <0x000000ac>;
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phandle = <0x000000ac>;
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};
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gpu {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "gpu";
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linux,phandle = <0x000000e1>;
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phandle = <0x000000e1>;
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};
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ce {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "ce";
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linux,phandle = <0x000000ab>;
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phandle = <0x000000ab>;
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};
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ve {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "ve";
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linux,phandle = <0x00000020>;
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phandle = <0x00000020>;
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};
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emce {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "emce";
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linux,phandle = <0x000000aa>;
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phandle = <0x000000aa>;
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};
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vp9 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "vp9";
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linux,phandle = <0x00000022>;
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phandle = <0x00000022>;
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};
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dma {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "dma";
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linux,phandle = <0x00000014>;
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phandle = <0x00000014>;
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};
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msgbox {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "msgbox";
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linux,phandle = <0x00000017>;
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phandle = <0x00000017>;
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};
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hwspinlock_rst {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "hwspinlock_rst";
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linux,phandle = <0x00000018>;
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phandle = <0x00000018>;
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};
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hwspinlock_bus {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "hwspinlock_bus";
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linux,phandle = <0x00000019>;
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phandle = <0x00000019>;
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};
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hstimer {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "hstimer";
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};
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avs {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "avs";
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};
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dbgsys {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "dbgsys";
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};
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pwm {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "pwm";
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linux,phandle = <0x00000093>;
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phandle = <0x00000093>;
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};
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iommu {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "iommu";
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linux,phandle = <0x000000df>;
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phandle = <0x000000df>;
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};
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sdram {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdram";
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};
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nand0 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "nand0";
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linux,phandle = <0x000000b6>;
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phandle = <0x000000b6>;
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};
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nand1 {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "nand1";
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linux,phandle = <0x000000b7>;
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phandle = <0x000000b7>;
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};
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sdmmc0_mod {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc0_mod";
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linux,phandle = <0x00000081>;
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phandle = <0x00000081>;
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};
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sdmmc0_bus {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc0_bus";
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linux,phandle = <0x00000082>;
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phandle = <0x00000082>;
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};
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sdmmc0_rst {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc0_rst";
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linux,phandle = <0x00000083>;
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phandle = <0x00000083>;
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};
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sdmmc1_mod {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc1_mod";
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linux,phandle = <0x00000088>;
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phandle = <0x00000088>;
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};
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sdmmc1_bus {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc1_bus";
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linux,phandle = <0x00000089>;
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phandle = <0x00000089>;
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};
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sdmmc1_rst {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc1_rst";
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linux,phandle = <0x0000008a>;
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phandle = <0x0000008a>;
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};
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sdmmc2_mod {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc2_mod";
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linux,phandle = <0x0000007c>;
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phandle = <0x0000007c>;
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};
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sdmmc2_bus {
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#clock-cells = <0x00000000>;
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compatible = "allwinner,periph-clock";
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clock-output-names = "sdmmc2_bus";
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linux,phandle = <0x0000007d>;
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phandle = <0x0000007d>;
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};
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sdmmc2_rst {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sdmmc2_rst";
|
|
linux,phandle = <0x0000007e>;
|
|
phandle = <0x0000007e>;
|
|
};
|
|
uart0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart0";
|
|
linux,phandle = <0x00000024>;
|
|
phandle = <0x00000024>;
|
|
};
|
|
uart1 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart1";
|
|
linux,phandle = <0x00000027>;
|
|
phandle = <0x00000027>;
|
|
};
|
|
uart2 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart2";
|
|
linux,phandle = <0x0000002a>;
|
|
phandle = <0x0000002a>;
|
|
};
|
|
uart3 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "uart3";
|
|
linux,phandle = <0x0000002d>;
|
|
phandle = <0x0000002d>;
|
|
};
|
|
twi0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi0";
|
|
linux,phandle = <0x00000030>;
|
|
phandle = <0x00000030>;
|
|
};
|
|
twi1 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi1";
|
|
linux,phandle = <0x00000033>;
|
|
phandle = <0x00000033>;
|
|
};
|
|
twi2 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi2";
|
|
linux,phandle = <0x00000036>;
|
|
phandle = <0x00000036>;
|
|
};
|
|
twi3 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "twi3";
|
|
linux,phandle = <0x00000039>;
|
|
phandle = <0x00000039>;
|
|
};
|
|
scr0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "scr0";
|
|
linux,phandle = <0x000000ad>;
|
|
phandle = <0x000000ad>;
|
|
};
|
|
scr1 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "scr1";
|
|
linux,phandle = <0x000000b2>;
|
|
phandle = <0x000000b2>;
|
|
};
|
|
spi0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "spi0";
|
|
linux,phandle = <0x0000006f>;
|
|
phandle = <0x0000006f>;
|
|
};
|
|
spi1 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "spi1";
|
|
linux,phandle = <0x00000073>;
|
|
phandle = <0x00000073>;
|
|
};
|
|
gmac {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "gmac";
|
|
linux,phandle = <0x000000d2>;
|
|
phandle = <0x000000d2>;
|
|
};
|
|
sata {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sata";
|
|
};
|
|
sata_24m {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "sata_24m";
|
|
};
|
|
ts {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ts";
|
|
linux,phandle = <0x000000bb>;
|
|
phandle = <0x000000bb>;
|
|
};
|
|
irtx {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "irtx";
|
|
};
|
|
ths {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ths";
|
|
linux,phandle = <0x000000c4>;
|
|
phandle = <0x000000c4>;
|
|
};
|
|
i2s0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "i2s0";
|
|
linux,phandle = <0x0000004a>;
|
|
phandle = <0x0000004a>;
|
|
};
|
|
i2s1 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "i2s1";
|
|
linux,phandle = <0x0000004d>;
|
|
phandle = <0x0000004d>;
|
|
};
|
|
i2s2 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "i2s2";
|
|
linux,phandle = <0x0000004e>;
|
|
phandle = <0x0000004e>;
|
|
};
|
|
i2s3 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "i2s3";
|
|
linux,phandle = <0x00000051>;
|
|
phandle = <0x00000051>;
|
|
};
|
|
spdif {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "spdif";
|
|
linux,phandle = <0x00000054>;
|
|
phandle = <0x00000054>;
|
|
};
|
|
dmic {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "dmic";
|
|
linux,phandle = <0x00000057>;
|
|
phandle = <0x00000057>;
|
|
};
|
|
ahub {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "ahub";
|
|
linux,phandle = <0x0000005a>;
|
|
phandle = <0x0000005a>;
|
|
};
|
|
usbphy0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbphy0";
|
|
linux,phandle = <0x0000003c>;
|
|
phandle = <0x0000003c>;
|
|
};
|
|
usbphy1 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbphy1";
|
|
linux,phandle = <0x00000042>;
|
|
phandle = <0x00000042>;
|
|
};
|
|
usbphy3 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbphy3";
|
|
linux,phandle = <0x00000044>;
|
|
phandle = <0x00000044>;
|
|
};
|
|
usbohci0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci0";
|
|
linux,phandle = <0x0000003f>;
|
|
phandle = <0x0000003f>;
|
|
};
|
|
usbohci0_12m {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci0_12m";
|
|
linux,phandle = <0x00000040>;
|
|
phandle = <0x00000040>;
|
|
};
|
|
usbohci3 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci3";
|
|
linux,phandle = <0x00000048>;
|
|
phandle = <0x00000048>;
|
|
};
|
|
usbohci3_12m {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbohci3_12m";
|
|
linux,phandle = <0x00000049>;
|
|
phandle = <0x00000049>;
|
|
};
|
|
usbehci0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbehci0";
|
|
linux,phandle = <0x0000003e>;
|
|
phandle = <0x0000003e>;
|
|
};
|
|
usbehci3 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbehci3";
|
|
linux,phandle = <0x00000045>;
|
|
phandle = <0x00000045>;
|
|
};
|
|
usb3_0_host {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usb3_0_host";
|
|
linux,phandle = <0x00000043>;
|
|
phandle = <0x00000043>;
|
|
};
|
|
usbotg {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbotg";
|
|
linux,phandle = <0x0000003d>;
|
|
phandle = <0x0000003d>;
|
|
};
|
|
usbhsic {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "usbhsic";
|
|
linux,phandle = <0x00000046>;
|
|
phandle = <0x00000046>;
|
|
};
|
|
pcieref {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "pcieref";
|
|
linux,phandle = <0x00000077>;
|
|
phandle = <0x00000077>;
|
|
};
|
|
pciemaxi {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clocks = <0x0000000b>;
|
|
assigned-clock-rates = <0x0bebc200>;
|
|
clock-output-names = "pciemaxi";
|
|
linux,phandle = <0x0000000b>;
|
|
phandle = <0x0000000b>;
|
|
};
|
|
pcieaux {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-rates = <0x000f4240>;
|
|
assigned-clocks = <0x0000000c>;
|
|
clock-output-names = "pcieaux";
|
|
linux,phandle = <0x0000000c>;
|
|
phandle = <0x0000000c>;
|
|
};
|
|
pcie_bus {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "pcie_bus";
|
|
linux,phandle = <0x00000078>;
|
|
phandle = <0x00000078>;
|
|
};
|
|
pcie_power {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "pcie_power";
|
|
linux,phandle = <0x00000079>;
|
|
phandle = <0x00000079>;
|
|
};
|
|
pcie_rst {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "pcie_rst";
|
|
linux,phandle = <0x0000007a>;
|
|
phandle = <0x0000007a>;
|
|
};
|
|
hdmi {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <0x00000006>;
|
|
assigned-clocks = <0x0000000d>;
|
|
clock-output-names = "hdmi";
|
|
linux,phandle = <0x0000000d>;
|
|
phandle = <0x0000000d>;
|
|
};
|
|
hdmi_slow {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clocks = <0x0000000e>;
|
|
clock-output-names = "hdmi_slow";
|
|
linux,phandle = <0x0000000e>;
|
|
phandle = <0x0000000e>;
|
|
};
|
|
hdmi_cec {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clocks = <0x0000000f>;
|
|
clock-output-names = "hdmi_cec";
|
|
linux,phandle = <0x0000000f>;
|
|
phandle = <0x0000000f>;
|
|
};
|
|
display_top {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "display_top";
|
|
linux,phandle = <0x0000008d>;
|
|
phandle = <0x0000008d>;
|
|
};
|
|
tcon_lcd {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "tcon_lcd";
|
|
linux,phandle = <0x0000008e>;
|
|
phandle = <0x0000008e>;
|
|
};
|
|
tcon_tv {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <0x00000006>;
|
|
assigned-clocks = <0x00000010>;
|
|
clock-output-names = "tcon_tv";
|
|
linux,phandle = <0x00000010>;
|
|
phandle = <0x00000010>;
|
|
};
|
|
csi_misc {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_misc";
|
|
linux,phandle = <0x0000009e>;
|
|
phandle = <0x0000009e>;
|
|
};
|
|
csi_top {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_top";
|
|
linux,phandle = <0x0000009a>;
|
|
phandle = <0x0000009a>;
|
|
};
|
|
csi_master0 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "csi_master0";
|
|
linux,phandle = <0x0000009b>;
|
|
phandle = <0x0000009b>;
|
|
};
|
|
hdmi_hdcp {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
assigned-clock-parents = <0x00000003>;
|
|
assigned-clocks = <0x00000011>;
|
|
clock-output-names = "hdmi_hdcp";
|
|
linux,phandle = <0x00000011>;
|
|
phandle = <0x00000011>;
|
|
};
|
|
pio {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-clock";
|
|
clock-output-names = "pio";
|
|
linux,phandle = <0x00000013>;
|
|
phandle = <0x00000013>;
|
|
};
|
|
cpurcir {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurcir";
|
|
linux,phandle = <0x0000001b>;
|
|
phandle = <0x0000001b>;
|
|
};
|
|
losc_out {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "losc_out";
|
|
linux,phandle = <0x000000d5>;
|
|
phandle = <0x000000d5>;
|
|
};
|
|
cpurcpus_pll {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurcpus_pll";
|
|
};
|
|
cpurcpus {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurcpus";
|
|
};
|
|
cpurahbs {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurahbs";
|
|
};
|
|
cpurapbs1 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurapbs1";
|
|
};
|
|
cpurapbs2_pll {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurapbs2_pll";
|
|
};
|
|
cpurapbs2 {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurapbs2";
|
|
};
|
|
cpurpio {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "cpurpio";
|
|
linux,phandle = <0x00000012>;
|
|
phandle = <0x00000012>;
|
|
};
|
|
spwm {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "spwm";
|
|
linux,phandle = <0x00000096>;
|
|
phandle = <0x00000096>;
|
|
};
|
|
dcxo_out {
|
|
#clock-cells = <0x00000000>;
|
|
compatible = "allwinner,periph-cpus-clock";
|
|
clock-output-names = "dcxo_out";
|
|
};
|
|
};
|
|
soc@03000000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <0x00000002>;
|
|
#size-cells = <0x00000002>;
|
|
ranges;
|
|
device_type = "soc";
|
|
pinctrl@07022000 {
|
|
compatible = "allwinner,sun50iw6p1-r-pinctrl";
|
|
reg = <0x00000000 0x07022000 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000069 0x00000004 0x00000000 0x0000006f 0x00000004>;
|
|
clocks = <0x00000012>;
|
|
device_type = "r_pio";
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x00000002>;
|
|
#size-cells = <0x00000000>;
|
|
#gpio-cells = <0x00000006>;
|
|
linux,phandle = <0x000000d6>;
|
|
phandle = <0x000000d6>;
|
|
s_twi0@0 {
|
|
allwinner,pins = "PL0", "PL1";
|
|
allwinner,function = "s_twi0";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000000>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x0000001d>;
|
|
phandle = <0x0000001d>;
|
|
};
|
|
s_cir0@0 {
|
|
allwinner,pins = "PL9";
|
|
allwinner,function = "s_cir0";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,drive = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x0000001a>;
|
|
phandle = <0x0000001a>;
|
|
};
|
|
twi_para@0 {
|
|
linux,phandle = <0x000000e4>;
|
|
phandle = <0x000000e4>;
|
|
allwinner,pins = "PL0", "PL1";
|
|
allwinner,function = "twi_para";
|
|
allwinner,pname = "twi_scl", "twi_sda";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000000>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
pwm16@0 {
|
|
linux,phandle = <0x0000010b>;
|
|
phandle = <0x0000010b>;
|
|
allwinner,pins = "PL8";
|
|
allwinner,function = "pwm16";
|
|
allwinner,pname = "pwm_positive";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
pwm16@1 {
|
|
linux,phandle = <0x0000010c>;
|
|
phandle = <0x0000010c>;
|
|
allwinner,pins = "PL8";
|
|
allwinner,function = "pwm16";
|
|
allwinner,pname = "pwm_positive";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
s_uart0@0 {
|
|
linux,phandle = <0x00000112>;
|
|
phandle = <0x00000112>;
|
|
allwinner,pins = "PL2", "PL3";
|
|
allwinner,function = "s_uart0";
|
|
allwinner,pname = "s_uart0_tx", "s_uart0_rx";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
s_rsb0@0 {
|
|
linux,phandle = <0x00000113>;
|
|
phandle = <0x00000113>;
|
|
allwinner,pins = "PL0", "PL1";
|
|
allwinner,function = "s_rsb0";
|
|
allwinner,pname = "s_rsb0_sck", "s_rsb0_sda";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000002>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
s_jtag0@0 {
|
|
linux,phandle = <0x00000114>;
|
|
phandle = <0x00000114>;
|
|
allwinner,pins = "PL4", "PL5", "PL6", "PL7";
|
|
allwinner,function = "s_jtag0";
|
|
allwinner,pname = "s_jtag0_tms", "s_jtag0_tck", "s_jtag0_tdo", "s_jtag0_tdi";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000002>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
};
|
|
pinctrl@0300b000 {
|
|
compatible = "allwinner,sun50iw6p1-pinctrl";
|
|
reg = <0x00000000 0x0300b000 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000033 0x00000004 0x00000000 0x00000035 0x00000004 0x00000000 0x00000036 0x00000004 0x00000000 0x0000003b 0x00000004>;
|
|
device_type = "pio";
|
|
clocks = <0x00000013>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x00000002>;
|
|
#size-cells = <0x00000000>;
|
|
#gpio-cells = <0x00000006>;
|
|
linux,phandle = <0x00000087>;
|
|
phandle = <0x00000087>;
|
|
twi3@1 {
|
|
allwinner,pins = "PB17", "PB18";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000003b>;
|
|
phandle = <0x0000003b>;
|
|
};
|
|
ts0@0 {
|
|
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11";
|
|
allwinner,pname = "ts0_clk", "ts0_err", "ts0_sync", "ts0_dvld", "ts0_d0", "ts0_d1", "ts0_d2", "ts0_d3", "ts0_d4", "ts0_d5", "ts0_d6", "ts0_d7";
|
|
allwinner,function = "ts0";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000bc>;
|
|
phandle = <0x000000bc>;
|
|
};
|
|
ts0_sleep@0 {
|
|
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11";
|
|
allwinner,pname = "ts0_clk", "ts0_err", "ts0_sync", "ts0_dvld", "ts0_d0", "ts0_d1", "ts0_d2", "ts0_d3", "ts0_d4", "ts0_d5", "ts0_d6", "ts0_d7";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000c0>;
|
|
phandle = <0x000000c0>;
|
|
};
|
|
ts1@0 {
|
|
allwinner,pins = "PD12", "PD13", "PD14", "PD15", "PD16";
|
|
allwinner,pname = "ts1_clk", "ts1_err", "ts1_sync", "ts1_dvld", "ts1_d0";
|
|
allwinner,function = "ts1";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000bd>;
|
|
phandle = <0x000000bd>;
|
|
};
|
|
ts1_sleep@0 {
|
|
allwinner,pins = "PD12", "PD13", "PD14", "PD15", "PD16";
|
|
allwinner,pname = "ts1_clk", "ts1_err", "ts1_sync", "ts1_dvld", "ts1_d0";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000c1>;
|
|
phandle = <0x000000c1>;
|
|
};
|
|
ts2@0 {
|
|
allwinner,pins = "PD17", "PD18", "PD19", "PD20", "PD21";
|
|
allwinner,pname = "ts2_clk", "ts2_err", "ts2_sync", "ts2_dvld", "ts2_d0";
|
|
allwinner,function = "ts2";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000be>;
|
|
phandle = <0x000000be>;
|
|
};
|
|
ts2_sleep@0 {
|
|
allwinner,pins = "PD17", "PD18", "PD19", "PD20", "PD21";
|
|
allwinner,pname = "ts2_clk", "ts2_err", "ts2_sync", "ts2_dvld", "ts2_d0";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000c2>;
|
|
phandle = <0x000000c2>;
|
|
};
|
|
ts3@0 {
|
|
allwinner,pins = "PD22", "PD23", "PD24", "PD25", "PD26";
|
|
allwinner,pname = "ts3_clk", "ts3_err", "ts3_sync", "ts3_dvld", "ts3_d0";
|
|
allwinner,function = "ts3";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000bf>;
|
|
phandle = <0x000000bf>;
|
|
};
|
|
ts3_sleep@0 {
|
|
allwinner,pins = "PD22", "PD23", "PD24", "PD25", "PD26";
|
|
allwinner,pname = "ts3_clk", "ts3_err", "ts3_sync", "ts3_dvld", "ts3_d0";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000c3>;
|
|
phandle = <0x000000c3>;
|
|
};
|
|
sdc0@1 {
|
|
allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x00000085>;
|
|
phandle = <0x00000085>;
|
|
};
|
|
sdc0@2 {
|
|
allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
|
|
allwinner,function = "uart0_jtag";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x00000086>;
|
|
phandle = <0x00000086>;
|
|
};
|
|
sdc1@1 {
|
|
allwinner,pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x0000008c>;
|
|
phandle = <0x0000008c>;
|
|
};
|
|
sdc2@1 {
|
|
allwinner,pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x00000080>;
|
|
phandle = <0x00000080>;
|
|
};
|
|
daudio0@0 {
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4";
|
|
allwinner,function = "pcm0";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000004b>;
|
|
phandle = <0x0000004b>;
|
|
};
|
|
daudio0_sleep@0 {
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000004c>;
|
|
phandle = <0x0000004c>;
|
|
};
|
|
daudio2@0 {
|
|
allwinner,pins = "PG10", "PG11", "PG12", "PG13", "PG14";
|
|
allwinner,function = "pcm2";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000004f>;
|
|
phandle = <0x0000004f>;
|
|
};
|
|
daudio2_sleep@0 {
|
|
allwinner,pins = "PG10", "PG11", "PG12", "PG13", "PG14";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000050>;
|
|
phandle = <0x00000050>;
|
|
};
|
|
daudio3@0 {
|
|
allwinner,pins = "PB12", "PB13", "PB14", "PB15", "PB16";
|
|
allwinner,function = "pcm3";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,driver = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000052>;
|
|
phandle = <0x00000052>;
|
|
};
|
|
daudio3_sleep@0 {
|
|
allwinner,pins = "PB12", "PB13", "PB14", "PB15", "PB16";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,driver = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000053>;
|
|
phandle = <0x00000053>;
|
|
};
|
|
spdif@0 {
|
|
allwinner,pins = "PH5", "PH6", "PH7";
|
|
allwinner,function = "spdif0";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000055>;
|
|
phandle = <0x00000055>;
|
|
};
|
|
spdif_sleep@0 {
|
|
allwinner,pins = "PH5", "PH6", "PH7";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000056>;
|
|
phandle = <0x00000056>;
|
|
};
|
|
dmic@0 {
|
|
allwinner,pins = "PD14", "PD15", "PD16", "PD17", "PD18";
|
|
allwinner,function = "dmic";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,driver = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000058>;
|
|
phandle = <0x00000058>;
|
|
};
|
|
dmic_sleep@0 {
|
|
allwinner,pins = "PD14", "PD15", "PD16", "PD17", "PD18";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,driver = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000059>;
|
|
phandle = <0x00000059>;
|
|
};
|
|
ahub_daudio0@0 {
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4";
|
|
allwinner,function = "h_pcm0";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,driver = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000005b>;
|
|
phandle = <0x0000005b>;
|
|
};
|
|
ahub_daudio0_sleep@0 {
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,driver = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000005c>;
|
|
phandle = <0x0000005c>;
|
|
};
|
|
ahub_daudio2@0 {
|
|
allwinner,pins = "PG10", "PG11", "PG12", "PG13", "PG14";
|
|
allwinner,function = "h_pcm2";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000005d>;
|
|
phandle = <0x0000005d>;
|
|
};
|
|
ahub_daudio2_sleep@0 {
|
|
allwinner,pins = "PG10", "PG11", "PG12", "PG13", "PG14";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000005e>;
|
|
phandle = <0x0000005e>;
|
|
};
|
|
ahub_daudio3@0 {
|
|
allwinner,pins = "PB12", "PB13", "PB14", "PB15", "PB16";
|
|
allwinner,function = "h_pcm3";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,driver = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x0000005f>;
|
|
phandle = <0x0000005f>;
|
|
};
|
|
ahub_daudio3_sleep@0 {
|
|
allwinner,pins = "PB12", "PB13", "PB14", "PB15", "PB16";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,driver = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000060>;
|
|
phandle = <0x00000060>;
|
|
};
|
|
csi0@1 {
|
|
allwinner,pins = "PD0", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11";
|
|
allwinner,pname = "csi0_pck", "csi0_hsync", "csi0_vsync", "csi0_d0", "csi0_d1", "csi0_d2", "csi0_d3", "csi0_d4", "csi0_d5", "csi0_d6", "csi0_d7";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,data = <0x00000000>;
|
|
linux,phandle = <0x000000a2>;
|
|
phandle = <0x000000a2>;
|
|
};
|
|
csi_mclk0@0 {
|
|
allwinner,pins = "PD1";
|
|
allwinner,pname = "csi_mclk0";
|
|
allwinner,function = "csi_mclk0";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,data = <0x00000000>;
|
|
linux,phandle = <0x0000009c>;
|
|
phandle = <0x0000009c>;
|
|
};
|
|
csi_mclk0@1 {
|
|
allwinner,pins = "PD1";
|
|
allwinner,pname = "csi_mclk0";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,data = <0x00000000>;
|
|
linux,phandle = <0x0000009d>;
|
|
phandle = <0x0000009d>;
|
|
};
|
|
csi_cci0@1 {
|
|
allwinner,pins = "PD12", "PD13";
|
|
allwinner,pname = "csi_cci0_sck", "csi_cci0_sda";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,data = <0x00000000>;
|
|
linux,phandle = <0x000000a0>;
|
|
phandle = <0x000000a0>;
|
|
};
|
|
scr0@0 {
|
|
allwinner,pins = "PG13", "PG14", "PG10", "PG11", "PG12";
|
|
allwinner,pname = "scr0_rst", "scr0_det", "scr0_vccen", "scr0_sck", "scr0_sda";
|
|
allwinner,function = "sim0";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,drive = <0x00000000>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x000000af>;
|
|
phandle = <0x000000af>;
|
|
};
|
|
scr0@1 {
|
|
allwinner,pins = "PG8", "PG9";
|
|
allwinner,pname = "scr0_vppen", "scr0_vppp";
|
|
allwinner,function = "sim0";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,drive = <0x00000000>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x000000b0>;
|
|
phandle = <0x000000b0>;
|
|
};
|
|
scr0@2 {
|
|
allwinner,pins = "PG8", "PG9", "PG10", "PG11", "PG12", "PG13", "PG14";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000000>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000b1>;
|
|
phandle = <0x000000b1>;
|
|
};
|
|
scr1@0 {
|
|
allwinner,pins = "PH5", "PH6", "PH2", "PH3", "PH4";
|
|
allwinner,pname = "scr1_rst", "scr1_det", "scr1_vccen", "scr1_sck", "scr1_sda";
|
|
allwinner,function = "sim1";
|
|
allwinner,muxsel = <0x00000005>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x000000b3>;
|
|
phandle = <0x000000b3>;
|
|
};
|
|
scr1@1 {
|
|
allwinner,pins = "PH0", "PH1";
|
|
allwinner,pname = "scr1_vppen", "scr1_vppp";
|
|
allwinner,function = "sim1";
|
|
allwinner,muxsel = <0x00000005>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000001>;
|
|
linux,phandle = <0x000000b4>;
|
|
phandle = <0x000000b4>;
|
|
};
|
|
scr1@2 {
|
|
allwinner,pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000b5>;
|
|
phandle = <0x000000b5>;
|
|
};
|
|
nand0@2 {
|
|
allwinner,pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000ba>;
|
|
phandle = <0x000000ba>;
|
|
};
|
|
hdmi@1 {
|
|
allwinner,pins = "PH8", "PH9";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000090>;
|
|
phandle = <0x00000090>;
|
|
};
|
|
hdmi@2 {
|
|
allwinner,pins = "PH10";
|
|
allwinner,function = "hcec0";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000091>;
|
|
phandle = <0x00000091>;
|
|
};
|
|
hdmi@3 {
|
|
allwinner,pins = "PH10";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000092>;
|
|
phandle = <0x00000092>;
|
|
};
|
|
ac200@2 {
|
|
allwinner,pins = "PB0";
|
|
allwinner,function = "ac200";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,drive = <0x00000000>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000098>;
|
|
phandle = <0x00000098>;
|
|
};
|
|
ac200@3 {
|
|
allwinner,pins = "PB0";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000000>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x00000099>;
|
|
phandle = <0x00000099>;
|
|
};
|
|
gmac@1 {
|
|
allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", "PA8", "PA9";
|
|
allwinner,function = "io_disabled";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,drive = <0x00000003>;
|
|
allwinner,pull = <0x00000000>;
|
|
linux,phandle = <0x000000d4>;
|
|
phandle = <0x000000d4>;
|
|
};
|
|
card0_boot_para@0 {
|
|
linux,phandle = <0x000000e2>;
|
|
phandle = <0x000000e2>;
|
|
allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
|
|
allwinner,function = "card0_boot_para";
|
|
allwinner,pname = "sdc_d1", "sdc_d0", "sdc_clk", "sdc_cmd", "sdc_d3", "sdc_d2";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000002>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
card2_boot_para@0 {
|
|
linux,phandle = <0x000000e3>;
|
|
phandle = <0x000000e3>;
|
|
allwinner,pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14";
|
|
allwinner,function = "card2_boot_para";
|
|
allwinner,pname = "sdc_ds", "sdc_clk", "sdc_cmd", "sdc_d0", "sdc_d1", "sdc_d2", "sdc_d3", "sdc_d4", "sdc_d5", "sdc_d6", "sdc_d7", "sdc_emmc_rst";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000003>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart_para@0 {
|
|
linux,phandle = <0x000000e5>;
|
|
phandle = <0x000000e5>;
|
|
allwinner,pins = "PH0", "PH1";
|
|
allwinner,function = "uart_para";
|
|
allwinner,pname = "uart_debug_tx", "uart_debug_rx";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
jtag_para@0 {
|
|
linux,phandle = <0x000000e6>;
|
|
phandle = <0x000000e6>;
|
|
allwinner,pins = "PD23", "PD24", "PD25", "PD26";
|
|
allwinner,function = "jtag_para";
|
|
allwinner,pname = "jtag_ms", "jtag_ck", "jtag_do", "jtag_di";
|
|
allwinner,muxsel = <0x00000005>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
gmac0@0 {
|
|
linux,phandle = <0x000000e7>;
|
|
phandle = <0x000000e7>;
|
|
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD19", "PD20";
|
|
allwinner,function = "gmac0";
|
|
allwinner,pname = "gmac_rxd3", "gmac_rxd2", "gmac_rxd1", "gmac_rxd0", "gmac_rxck", "gmac_rxctl", "gmac_txd3", "gmac_txd2", "gmac_txd1", "gmac_txd0", "gmac_txck", "gmac_txctl", "gmac_clkin", "gmac_ephyrst", "gmac_mdc", "gmac_mdio";
|
|
allwinner,muxsel = <0x00000005>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0x00000003>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
twi0@0 {
|
|
linux,phandle = <0x000000e8>;
|
|
phandle = <0x000000e8>;
|
|
allwinner,pins = "PD25", "PD26";
|
|
allwinner,function = "twi0";
|
|
allwinner,pname = "twi0_scl", "twi0_sda";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
twi0@1 {
|
|
linux,phandle = <0x000000e9>;
|
|
phandle = <0x000000e9>;
|
|
allwinner,pins = "PD25", "PD26";
|
|
allwinner,function = "twi0";
|
|
allwinner,pname = "twi0_scl", "twi0_sda";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
twi1@0 {
|
|
linux,phandle = <0x000000ea>;
|
|
phandle = <0x000000ea>;
|
|
allwinner,pins = "PH5", "PH6";
|
|
allwinner,function = "twi1";
|
|
allwinner,pname = "twi1_scl", "twi1_sda";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
twi1@1 {
|
|
linux,phandle = <0x000000eb>;
|
|
phandle = <0x000000eb>;
|
|
allwinner,pins = "PH5", "PH6";
|
|
allwinner,function = "twi1";
|
|
allwinner,pname = "twi1_scl", "twi1_sda";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
twi2@0 {
|
|
linux,phandle = <0x000000ec>;
|
|
phandle = <0x000000ec>;
|
|
allwinner,pins = "PD23", "PD24";
|
|
allwinner,function = "twi2";
|
|
allwinner,pname = "twi2_scl", "twi2_sda";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
twi2@1 {
|
|
linux,phandle = <0x000000ed>;
|
|
phandle = <0x000000ed>;
|
|
allwinner,pins = "PD23", "PD24";
|
|
allwinner,function = "twi2";
|
|
allwinner,pname = "twi2_scl", "twi2_sda";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
twi3@0 {
|
|
linux,phandle = <0x000000ee>;
|
|
phandle = <0x000000ee>;
|
|
allwinner,pins = "PB17", "PB18";
|
|
allwinner,function = "twi3";
|
|
allwinner,pname = "twi3_scl", "twi3_sda";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart0@0 {
|
|
linux,phandle = <0x000000ef>;
|
|
phandle = <0x000000ef>;
|
|
allwinner,pins = "PH0", "PH1";
|
|
allwinner,function = "uart0";
|
|
allwinner,pname = "uart0_tx", "uart0_rx";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart0@1 {
|
|
linux,phandle = <0x000000f0>;
|
|
phandle = <0x000000f0>;
|
|
allwinner,pins = "PH0", "PH1";
|
|
allwinner,function = "uart0";
|
|
allwinner,pname = "uart0_tx", "uart0_rx";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart1@0 {
|
|
linux,phandle = <0x000000f1>;
|
|
phandle = <0x000000f1>;
|
|
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
|
|
allwinner,function = "uart1";
|
|
allwinner,pname = "uart1_tx", "uart1_rx", "uart1_rts", "uart1_cts";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart1@1 {
|
|
linux,phandle = <0x000000f2>;
|
|
phandle = <0x000000f2>;
|
|
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
|
|
allwinner,function = "uart1";
|
|
allwinner,pname = "uart1_tx", "uart1_rx", "uart1_rts", "uart1_cts";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart2@0 {
|
|
linux,phandle = <0x000000f3>;
|
|
phandle = <0x000000f3>;
|
|
allwinner,pins = "PD19", "PD20", "PD21", "PD22";
|
|
allwinner,function = "uart2";
|
|
allwinner,pname = "uart2_tx", "uart2_rx", "uart2_rts", "uart2_cts";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart2@1 {
|
|
linux,phandle = <0x000000f4>;
|
|
phandle = <0x000000f4>;
|
|
allwinner,pins = "PD19", "PD20", "PD21", "PD22";
|
|
allwinner,function = "uart2";
|
|
allwinner,pname = "uart2_tx", "uart2_rx", "uart2_rts", "uart2_cts";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart3@0 {
|
|
linux,phandle = <0x000000f5>;
|
|
phandle = <0x000000f5>;
|
|
allwinner,pins = "PD23", "PD24";
|
|
allwinner,function = "uart3";
|
|
allwinner,pname = "uart3_tx", "uart3_rx";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
uart3@1 {
|
|
linux,phandle = <0x000000f6>;
|
|
phandle = <0x000000f6>;
|
|
allwinner,pins = "PD23", "PD24";
|
|
allwinner,function = "uart3";
|
|
allwinner,pname = "uart3_tx", "uart3_rx";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
spi0@0 {
|
|
linux,phandle = <0x000000f7>;
|
|
phandle = <0x000000f7>;
|
|
allwinner,pins = "PC5";
|
|
allwinner,function = "spi0";
|
|
allwinner,pname = "spi0_cs0";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
spi0@1 {
|
|
linux,phandle = <0x000000f8>;
|
|
phandle = <0x000000f8>;
|
|
allwinner,pins = "PC0", "PC2", "PC3";
|
|
allwinner,function = "spi0";
|
|
allwinner,pname = "spi0_sclk", "spi0_mosi", "spi0_miso";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
spi0@2 {
|
|
linux,phandle = <0x000000f9>;
|
|
phandle = <0x000000f9>;
|
|
allwinner,pins = "PC5";
|
|
allwinner,function = "spi0";
|
|
allwinner,pname = "spi0_cs0";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
spi0@3 {
|
|
linux,phandle = <0x000000fa>;
|
|
phandle = <0x000000fa>;
|
|
allwinner,pins = "PC0", "PC2", "PC3";
|
|
allwinner,function = "spi0";
|
|
allwinner,pname = "spi0_sclk", "spi0_mosi", "spi0_miso";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
spi1@0 {
|
|
linux,phandle = <0x000000fb>;
|
|
phandle = <0x000000fb>;
|
|
allwinner,pins = "PH3";
|
|
allwinner,function = "spi1";
|
|
allwinner,pname = "spi1_cs0";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
spi1@1 {
|
|
linux,phandle = <0x000000fc>;
|
|
phandle = <0x000000fc>;
|
|
allwinner,pins = "PH4", "PH5", "PH6";
|
|
allwinner,function = "spi1";
|
|
allwinner,pname = "spi1_sclk", "spi1_mosi", "spi1_miso";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
spi1@2 {
|
|
linux,phandle = <0x000000fd>;
|
|
phandle = <0x000000fd>;
|
|
allwinner,pins = "PH3";
|
|
allwinner,function = "spi1";
|
|
allwinner,pname = "spi1_cs0";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
spi1@3 {
|
|
linux,phandle = <0x000000fe>;
|
|
phandle = <0x000000fe>;
|
|
allwinner,pins = "PH4", "PH5", "PH6";
|
|
allwinner,function = "spi1";
|
|
allwinner,pname = "spi1_sclk", "spi1_mosi", "spi1_miso";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
nand0@0 {
|
|
linux,phandle = <0x00000100>;
|
|
phandle = <0x00000100>;
|
|
allwinner,pins = "PC0", "PC1", "PC2", "PC4", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14";
|
|
allwinner,function = "nand0";
|
|
allwinner,pname = "nand0_we", "nand0_ale", "nand0_cle", "nand0_nre", "nand0_d0", "nand0_d1", "nand0_d2", "nand0_d3", "nand0_d4", "nand0_d5", "nand0_d6", "nand0_d7", "nand0_ndqs";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
nand0@1 {
|
|
linux,phandle = <0x00000101>;
|
|
phandle = <0x00000101>;
|
|
allwinner,pins = "PC15", "PC3", "PC5", "PC16";
|
|
allwinner,function = "nand0";
|
|
allwinner,pname = "nand0_ce1", "nand0_ce0", "nand0_rb0", "nand0_rb1";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
lcd0@0 {
|
|
linux,phandle = <0x00000102>;
|
|
phandle = <0x00000102>;
|
|
allwinner,pins = "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21";
|
|
allwinner,function = "lcd0";
|
|
allwinner,pname = "lcdd0", "lcdd1", "lcdd2", "lcdd3", "lcdd4", "lcdd5", "lcdd6", "lcdd7", "lcdd8", "lcdd9";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
lcd0@1 {
|
|
linux,phandle = <0x00000103>;
|
|
phandle = <0x00000103>;
|
|
allwinner,pins = "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21";
|
|
allwinner,function = "lcd0";
|
|
allwinner,pname = "lcdd0", "lcdd1", "lcdd2", "lcdd3", "lcdd4", "lcdd5", "lcdd6", "lcdd7", "lcdd8", "lcdd9";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
hdmi@0 {
|
|
linux,phandle = <0x00000104>;
|
|
phandle = <0x00000104>;
|
|
allwinner,pins = "PH8", "PH9", "PH10";
|
|
allwinner,function = "hdmi";
|
|
allwinner,pname = "ddc_scl", "ddc_sda", "cec_io";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0x00000001>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
ac200@0 {
|
|
linux,phandle = <0x00000105>;
|
|
phandle = <0x00000105>;
|
|
allwinner,pins = "PB0", "PB1", "PB2", "PB3", "PB4", "PB5", "PB6", "PB7", "PB8", "PB9", "PB10", "PB11";
|
|
allwinner,function = "ac200";
|
|
allwinner,pname = "ccir_clk", "ccir_de", "ccir_hs", "ccir_vs", "ccir_do0", "ccir_do1", "ccir_do2", "ccir_do3", "ccir_do4", "ccir_do5", "ccir_do6", "ccir_do7";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
ac200@1 {
|
|
linux,phandle = <0x00000106>;
|
|
phandle = <0x00000106>;
|
|
allwinner,pins = "PB1", "PB2", "PB3", "PB4", "PB5", "PB6", "PB7", "PB8", "PB9", "PB10", "PB11";
|
|
allwinner,function = "ac200";
|
|
allwinner,pname = "ccir_de", "ccir_hs", "ccir_vs", "ccir_do0", "ccir_do1", "ccir_do2", "ccir_do3", "ccir_do4", "ccir_do5", "ccir_do6", "ccir_do7";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
pwm0@0 {
|
|
linux,phandle = <0x00000107>;
|
|
phandle = <0x00000107>;
|
|
allwinner,pins = "PD22";
|
|
allwinner,function = "pwm0";
|
|
allwinner,pname = "pwm_positive";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
pwm0@1 {
|
|
linux,phandle = <0x00000108>;
|
|
phandle = <0x00000108>;
|
|
allwinner,pins = "PD22";
|
|
allwinner,function = "pwm0";
|
|
allwinner,pname = "pwm_positive";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
pwm1@0 {
|
|
linux,phandle = <0x00000109>;
|
|
phandle = <0x00000109>;
|
|
allwinner,pins = "PB19";
|
|
allwinner,function = "pwm1";
|
|
allwinner,pname = "pwm_positive";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
pwm1@1 {
|
|
linux,phandle = <0x0000010a>;
|
|
phandle = <0x0000010a>;
|
|
allwinner,pins = "PB19";
|
|
allwinner,function = "pwm1";
|
|
allwinner,pname = "pwm_positive";
|
|
allwinner,muxsel = <0x00000007>;
|
|
allwinner,pull = <0x00000000>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
csi0@0 {
|
|
linux,phandle = <0x0000010d>;
|
|
phandle = <0x0000010d>;
|
|
allwinner,pins = "PD0", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11";
|
|
allwinner,function = "csi0";
|
|
allwinner,pname = "csi0_pck", "csi0_hsync", "csi0_vsync", "csi0_d0", "csi0_d1", "csi0_d2", "csi0_d3", "csi0_d4", "csi0_d5", "csi0_d6", "csi0_d7";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
csi_cci0@0 {
|
|
linux,phandle = <0x0000010e>;
|
|
phandle = <0x0000010e>;
|
|
allwinner,pins = "PD12", "PD13";
|
|
allwinner,function = "csi_cci0";
|
|
allwinner,pname = "csi_cci0_sck", "csi_cci0_sda";
|
|
allwinner,muxsel = <0x00000004>;
|
|
allwinner,pull = <0xffffffff>;
|
|
allwinner,drive = <0xffffffff>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
sdc0@0 {
|
|
linux,phandle = <0x0000010f>;
|
|
phandle = <0x0000010f>;
|
|
allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
|
|
allwinner,function = "sdc0";
|
|
allwinner,pname = "sdc0_d1", "sdc0_d0", "sdc0_clk", "sdc0_cmd", "sdc0_d3", "sdc0_d2";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000002>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
sdc1@0 {
|
|
linux,phandle = <0x00000110>;
|
|
phandle = <0x00000110>;
|
|
allwinner,pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
|
|
allwinner,function = "sdc1";
|
|
allwinner,pname = "sdc1_clk", "sdc1_cmd", "sdc1_d0", "sdc1_d1", "sdc1_d2", "sdc1_d3";
|
|
allwinner,muxsel = <0x00000002>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000003>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
sdc2@0 {
|
|
linux,phandle = <0x00000111>;
|
|
phandle = <0x00000111>;
|
|
allwinner,pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14";
|
|
allwinner,function = "sdc2";
|
|
allwinner,pname = "sdc2_ds", "sdc2_clk", "sdc2_cmd", "sdc2_d0", "sdc2_d1", "sdc2_d2", "sdc2_d3", "sdc2_d4", "sdc2_d5", "sdc2_d6", "sdc2_d7", "sdc2_emmc_rst";
|
|
allwinner,muxsel = <0x00000003>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000003>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
Vdevice@0 {
|
|
linux,phandle = <0x00000115>;
|
|
phandle = <0x00000115>;
|
|
allwinner,pins = "PH9", "PH10";
|
|
allwinner,function = "Vdevice";
|
|
allwinner,pname = "Vdevice_0", "Vdevice_1";
|
|
allwinner,muxsel = <0x00000005>;
|
|
allwinner,pull = <0x00000001>;
|
|
allwinner,drive = <0x00000002>;
|
|
allwinner,data = <0xffffffff>;
|
|
};
|
|
};
|
|
dma-controller@03002000 {
|
|
compatible = "allwinner,sun50i-dma";
|
|
reg = <0x00000000 0x03002000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x0000002b 0x00000004>;
|
|
clocks = <0x00000014>;
|
|
#dma-cells = <0x00000001>;
|
|
};
|
|
mbus-controller@04002000 {
|
|
compatible = "allwinner,sun50i-mbus";
|
|
reg = <0x00000000 0x04002000 0x00000000 0x00001000>;
|
|
#mbus-cells = <0x00000001>;
|
|
};
|
|
arisc {
|
|
compatible = "allwinner,sunxi-arisc";
|
|
#address-cells = <0x00000002>;
|
|
#size-cells = <0x00000002>;
|
|
clocks = <0x00000015 0x00000016 0x00000007 0x00000002>;
|
|
clock-names = "losc", "iosc", "hosc", "pll_periph0";
|
|
powchk_used = <0x00000000>;
|
|
power_reg = <0x02309621>;
|
|
system_power = <0x00000032>;
|
|
};
|
|
arisc_space {
|
|
compatible = "allwinner,arisc_space";
|
|
space1 = <0x48040000 0x00000000 0x00014000>;
|
|
space2 = <0x48100000 0x00018000 0x00004000>;
|
|
space3 = <0x48104000 0x00000000 0x00001000>;
|
|
space4 = <0x48105000 0x00000000 0x00001000>;
|
|
};
|
|
standby_space@040020000 {
|
|
compatible = "allwinner,sun50iw6-usbstandby";
|
|
space1 = <0x40020000 0x00000000 0x00000800>;
|
|
};
|
|
msgbox@03003000 {
|
|
compatible = "allwinner,msgbox";
|
|
clocks = <0x00000017>;
|
|
clock-names = "clk_msgbox";
|
|
reg = <0x00000000 0x03003000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000027 0x00000001>;
|
|
status = "okay";
|
|
};
|
|
hwspinlock@3004000 {
|
|
compatible = "allwinner,sunxi-hwspinlock";
|
|
clocks = <0x00000018 0x00000019>;
|
|
clock-names = "clk_hwspinlock_rst", "clk_hwspinlock_bus";
|
|
reg = <0x00000000 0x03004000 0x00000000 0x00001000>;
|
|
num-locks = <0x00000008>;
|
|
status = "okay";
|
|
};
|
|
s_cir@07040000 {
|
|
compatible = "allwinner,s_cir";
|
|
reg = <0x00000000 0x07040000 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x0000006d 0x00000004>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x0000001a>;
|
|
clocks = <0x00000007 0x0000001b>;
|
|
supply = "vcc-pl";
|
|
supply_vol = "3300000";
|
|
status = "okay";
|
|
device_type = "s_cir0";
|
|
ir_protocol_used = <0x00000000>;
|
|
ir_power_key_code0 = <0x00000057>;
|
|
ir_addr_code0 = <0x00009f00>;
|
|
ir_power_key_code1 = <0x0000001a>;
|
|
ir_addr_code1 = <0x0000fb04>;
|
|
ir_power_key_code2 = <0x00000014>;
|
|
ir_addr_code2 = <0x00007f80>;
|
|
ir_power_key_code3 = <0x00000015>;
|
|
ir_addr_code3 = <0x00007f80>;
|
|
ir_power_key_code4 = <0x0000000b>;
|
|
ir_addr_code4 = <0x0000f708>;
|
|
ir_power_key_code5 = <0x00000003>;
|
|
ir_addr_code5 = <0x000000ef>;
|
|
ir_power_key_code6 = <0x000000dc>;
|
|
ir_addr_code6 = <0x00004cb3>;
|
|
ir_power_key_code7 = <0x0000000a>;
|
|
ir_addr_code7 = <0x00007748>;
|
|
ir_power_key_code8 = <0x00000045>;
|
|
ir_addr_code8 = <0x0000bd02>;
|
|
ir_power_key_code9 = <0x0000004d>;
|
|
ir_addr_code9 = <0x0000de21>;
|
|
ir_power_key_code10 = <0x00000018>;
|
|
ir_addr_code10 = <0x0000fe01>;
|
|
ir_power_key_code11 = <0x00000018>;
|
|
ir_addr_code11 = <0x0000ff00>;
|
|
ir_power_key_code12 = <0x0000004d>;
|
|
ir_addr_code12 = <0x0000ff40>;
|
|
ir_power_key_code13 = <0x00000088>;
|
|
ir_addr_code13 = <0x0000dd22>;
|
|
ir_power_key_code14 = <0x0000000d>;
|
|
ir_addr_code14 = <0x0000bc00>;
|
|
ir_power_key_code15 = <0x0000000d>;
|
|
ir_addr_code15 = <0x0000fc00>;
|
|
rc5_ir_power_key_code0 = <0x00000001>;
|
|
rc5_ir_addr_code0 = <0x00000004>;
|
|
};
|
|
s_uart@7080000 {
|
|
compatible = "allwinner,s_uart";
|
|
reg = <0x00000000 0x07080000 0x00000000 0x000000d0>;
|
|
interrupts = <0x00000000 0x0000006a 0x00000004>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
device_type = "s_uart0";
|
|
pinctrl-0 = <0x00000112>;
|
|
};
|
|
s_twi@1f03400 {
|
|
compatible = "allwinner,s_twi";
|
|
reg = <0x00000000 0x01f02400 0x00000000 0x00000020>;
|
|
interrupts = <0x00000000 0x0000002c 0x00000004>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x0000001d>;
|
|
status = "okay";
|
|
};
|
|
s_jtag0 {
|
|
compatible = "allwinner,s_jtag";
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
device_type = "s_jtag0";
|
|
pinctrl-0 = <0x00000114>;
|
|
};
|
|
box_start_os0 {
|
|
compatible = "allwinner,box_start_os";
|
|
start_type = <0x00000001>;
|
|
irkey_used = <0x00000001>;
|
|
pmukey_used = <0x00000001>;
|
|
pmukey_num = <0x00000000>;
|
|
led_power = <0x00000000>;
|
|
led_state = <0x00000000>;
|
|
status = "okay";
|
|
device_type = "box_start_os";
|
|
};
|
|
timer@03009000 {
|
|
compatible = "allwinner,sun4i-a10-timer";
|
|
device_type = "timer";
|
|
reg = <0x00000000 0x03009000 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000030 0x00000004>;
|
|
clock-frequency = <0x016e3600>;
|
|
timer-prescale = <0x00000010>;
|
|
};
|
|
rtc@07000000 {
|
|
compatible = "allwinner,sun50iw6-rtc";
|
|
device_type = "rtc";
|
|
reg = <0x00000000 0x07000000 0x00000000 0x00000200>;
|
|
interrupts = <0x00000000 0x00000065 0x00000004>;
|
|
gpr_offset = <0x00000100>;
|
|
gpr_len = <0x00000008>;
|
|
gpr_cur_pos = <0x00000006>;
|
|
};
|
|
watchdog@030090a0 {
|
|
compatible = "allwinner,sun50i-wdt";
|
|
reg = <0x00000000 0x030090a0 0x00000000 0x00000020>;
|
|
interrupts = <0x00000000 0x00000032 0x00000004>;
|
|
};
|
|
ve@01c0e000 {
|
|
compatible = "allwinner,sunxi-cedar-ve";
|
|
reg = <0x00000000 0x01c0e000 0x00000000 0x00001000 0x00000000 0x03000000 0x00000000 0x00000010 0x00000000 0x03001000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000059 0x00000004>;
|
|
clocks = <0x0000001f 0x00000020>;
|
|
iommus = <0x00000021 0x00000003 0x00000001>;
|
|
};
|
|
vp9@01c00000 {
|
|
compatible = "allwinner,sunxi-google-vp9";
|
|
reg = <0x00000000 0x01c00000 0x00000000 0x00001000 0x00000000 0x03000000 0x00000000 0x00000010 0x00000000 0x03001000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x0000005a 0x00000004>;
|
|
clocks = <0x0000001f 0x00000022>;
|
|
#clocks = <0x00000023 0x00000022>;
|
|
iommus = <0x00000021 0x00000005 0x00000001>;
|
|
};
|
|
uart@05000000 {
|
|
compatible = "allwinner,sun50i-uart";
|
|
device_type = "uart0";
|
|
reg = <0x00000000 0x05000000 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000000 0x00000004>;
|
|
clocks = <0x00000024>;
|
|
pinctrl-names = "default", "sleep";
|
|
uart0_port = <0x00000000>;
|
|
uart0_type = <0x00000002>;
|
|
status = "okay";
|
|
pinctrl-0 = <0x000000ef>;
|
|
pinctrl-1 = <0x000000f0>;
|
|
};
|
|
uart@05000400 {
|
|
compatible = "allwinner,sun50i-uart";
|
|
device_type = "uart1";
|
|
reg = <0x00000000 0x05000400 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000001 0x00000004>;
|
|
clocks = <0x00000027>;
|
|
pinctrl-names = "default", "sleep";
|
|
uart1_port = <0x00000001>;
|
|
uart1_type = <0x00000004>;
|
|
status = "okay";
|
|
pinctrl-0 = <0x000000f1>;
|
|
uart1_bt = <0x00000001>;
|
|
pinctrl-1 = <0x000000f2>;
|
|
};
|
|
uart@05000800 {
|
|
compatible = "allwinner,sun50i-uart";
|
|
device_type = "uart2";
|
|
reg = <0x00000000 0x05000800 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000002 0x00000004>;
|
|
clocks = <0x0000002a>;
|
|
pinctrl-names = "default", "sleep";
|
|
uart2_port = <0x00000002>;
|
|
uart2_type = <0x00000004>;
|
|
status = "disabled";
|
|
pinctrl-0 = <0x000000f3>;
|
|
pinctrl-1 = <0x000000f4>;
|
|
};
|
|
uart@05000c00 {
|
|
compatible = "allwinner,sun50i-uart";
|
|
device_type = "uart3";
|
|
reg = <0x00000000 0x05000c00 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000003 0x00000004>;
|
|
clocks = <0x0000002d>;
|
|
pinctrl-names = "default", "sleep";
|
|
uart3_port = <0x00000003>;
|
|
uart3_type = <0x00000002>;
|
|
status = "okay";
|
|
pinctrl-0 = <0x000000f5>;
|
|
pinctrl-1 = <0x000000f6>;
|
|
};
|
|
twi@0x05002000 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sun50i-twi";
|
|
device_type = "twi0";
|
|
reg = <0x00000000 0x05002000 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000004 0x00000004>;
|
|
clocks = <0x00000030>;
|
|
clock-frequency = <0x00061a80>;
|
|
pinctrl-names = "default", "sleep";
|
|
status = "okay";
|
|
pinctrl-0 = <0x000000e8>;
|
|
pinctrl-1 = <0x000000e9>;
|
|
};
|
|
twi@0x05002400 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sun50i-twi";
|
|
device_type = "twi1";
|
|
reg = <0x00000000 0x05002400 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000005 0x00000004>;
|
|
clocks = <0x00000033>;
|
|
clock-frequency = <0x00030d40>;
|
|
pinctrl-names = "default", "sleep";
|
|
status = "disabled";
|
|
pinctrl-0 = <0x000000ea>;
|
|
pinctrl-1 = <0x000000eb>;
|
|
};
|
|
twi@0x05002800 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sun50i-twi";
|
|
device_type = "twi2";
|
|
reg = <0x00000000 0x05002800 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000006 0x00000004>;
|
|
clocks = <0x00000036>;
|
|
clock-frequency = <0x00030d40>;
|
|
pinctrl-names = "default", "sleep";
|
|
status = "disabled";
|
|
pinctrl-0 = <0x000000ec>;
|
|
pinctrl-1 = <0x000000ed>;
|
|
};
|
|
twi@0x05002c00 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sun50i-twi";
|
|
device_type = "twi3";
|
|
reg = <0x00000000 0x05002c00 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000007 0x00000004>;
|
|
clocks = <0x00000039>;
|
|
clock-frequency = <0x00030d40>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-1 = <0x0000003b>;
|
|
status = "okay";
|
|
pinctrl-0 = <0x000000ee>;
|
|
};
|
|
usbc0@0 {
|
|
device_type = "usbc0";
|
|
compatible = "allwinner,sunxi-otg-manager";
|
|
usb_port_type = <0x00000002>;
|
|
usb_detect_type = <0x00000001>;
|
|
usb_host_init_state = <0x00000001>;
|
|
usb_regulator_io = "nocare";
|
|
usb_wakeup_suspend = <0x00000000>;
|
|
usb_luns = <0x00000003>;
|
|
usb_serial_unique = <0x00000000>;
|
|
usb_serial_number = "20080411";
|
|
rndis_wceis = <0x00000001>;
|
|
status = "okay";
|
|
usb_detect_mode = <0x00000000>;
|
|
usb_id_gpio;
|
|
usb_det_vbus_gpio;
|
|
usb_drv_vbus_gpio = <0x000000d6 0x0000000b 0x00000005 0x00000001 0x00000000 0xffffffff 0x00000001>;
|
|
};
|
|
udc-controller@0x05100000 {
|
|
compatible = "allwinner,sunxi-udc";
|
|
reg = <0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x00000000 0x00000000 0x00000100>;
|
|
interrupts = <0x00000000 0x00000017 0x00000004>;
|
|
clocks = <0x0000003c 0x0000003d>;
|
|
status = "okay";
|
|
};
|
|
ehci0-controller@0x05101000 {
|
|
compatible = "allwinner,sunxi-ehci0";
|
|
reg = <0x00000000 0x05101000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000018 0x00000004>;
|
|
clocks = <0x0000003c 0x0000003e>;
|
|
hci_ctrl_no = <0x00000000>;
|
|
status = "okay";
|
|
};
|
|
ohci0-controller@0x05101400 {
|
|
compatible = "allwinner,sunxi-ohci0";
|
|
reg = <0x00000000 0x05101000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000019 0x00000004>;
|
|
clocks = <0x0000003c 0x0000003f 0x00000040 0x00000041 0x00000007 0x00000015>;
|
|
hci_ctrl_no = <0x00000000>;
|
|
status = "okay";
|
|
};
|
|
usbc1@0 {
|
|
device_type = "usbc1";
|
|
usb_host_init_state = <0x00000001>;
|
|
usb_regulator_io = "nocare";
|
|
usb_wakeup_suspend = <0x00000000>;
|
|
status = "okay";
|
|
usb_drv_vbus_gpio = <0x000000d6 0x0000000b 0x00000005 0x00000001 0x00000000 0xffffffff 0x00000001>;
|
|
};
|
|
xhci-controller@0x05200000 {
|
|
compatible = "allwinner,sunxi-xhci";
|
|
reg = <0x00000000 0x05200000 0x00000000 0x000fffff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x0000001a 0x00000004>;
|
|
clocks = <0x00000042 0x00000043>;
|
|
hci_ctrl_no = <0x00000001>;
|
|
status = "okay";
|
|
};
|
|
usbc2@0 {
|
|
device_type = "usbc2";
|
|
usb_host_init_state = <0x00000001>;
|
|
usb_regulator_io = "nocare";
|
|
usb_wakeup_suspend = <0x00000000>;
|
|
status = "disabled";
|
|
usb_drv_vbus_gpio;
|
|
};
|
|
ehci3-controller@0x05311000 {
|
|
compatible = "allwinner,sunxi-ehci3";
|
|
reg = <0x00000000 0x05311000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x0000001c 0x00000004>;
|
|
clocks = <0x00000044 0x00000045 0x00000046 0x00000046 0x00000047>;
|
|
hci_ctrl_no = <0x00000003>;
|
|
status = "okay";
|
|
};
|
|
ohci3-controller@0x05311400 {
|
|
compatible = "allwinner,sunxi-ohci3";
|
|
reg = <0x00000000 0x05311000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x0000001d 0x00000004>;
|
|
clocks = <0x00000044 0x00000048 0x00000049 0x00000041 0x00000007 0x00000015>;
|
|
hci_ctrl_no = <0x00000003>;
|
|
status = "okay";
|
|
};
|
|
ac200_codec {
|
|
compatible = "allwinner,ac200_codec";
|
|
status = "okay";
|
|
device_type = "ac200_codec";
|
|
gpio-spk = <0x000000d6 0x0000000b 0x00000006 0x00000001 0x00000001 0xffffffff 0xffffffff>;
|
|
};
|
|
daudio@0x05090000 {
|
|
compatible = "allwinner,sunxi-daudio";
|
|
reg = <0x00000000 0x05090000 0x00000000 0x00000074>;
|
|
clocks = <0x00000004 0x0000004a>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x0000004b>;
|
|
pinctrl-1 = <0x0000004c>;
|
|
pcm_lrck_period = <0x00000020>;
|
|
slot_width_select = <0x00000020>;
|
|
daudio_master = <0x00000004>;
|
|
audio_format = <0x00000001>;
|
|
signal_inversion = <0x00000001>;
|
|
tdm_config = <0x00000001>;
|
|
frametype = <0x00000000>;
|
|
tdm_num = <0x00000000>;
|
|
mclk_div = <0x00000000>;
|
|
status = "disabled";
|
|
linux,phandle = <0x00000061>;
|
|
phandle = <0x00000061>;
|
|
device_type = "daudio0";
|
|
};
|
|
daudio@0x05091000 {
|
|
compatible = "allwinner,sunxi-tdmhdmi";
|
|
reg = <0x00000000 0x05091000 0x00000000 0x00000074>;
|
|
clocks = <0x00000004 0x0000004d>;
|
|
status = "okay";
|
|
linux,phandle = <0x00000063>;
|
|
phandle = <0x00000063>;
|
|
device_type = "audiohdmi";
|
|
};
|
|
daudio@0x05092000 {
|
|
compatible = "allwinner,sunxi-daudio";
|
|
reg = <0x00000000 0x05092000 0x00000000 0x00000074>;
|
|
clocks = <0x00000004 0x0000004e>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x0000004f>;
|
|
pinctrl-1 = <0x00000050>;
|
|
pcm_lrck_period = <0x00000040>;
|
|
slot_width_select = <0x00000020>;
|
|
daudio_master = <0x00000004>;
|
|
audio_format = <0x00000004>;
|
|
signal_inversion = <0x00000003>;
|
|
tdm_config = <0x00000001>;
|
|
frametype = <0x00000000>;
|
|
tdm_num = <0x00000002>;
|
|
mclk_div = <0x00000001>;
|
|
status = "okay";
|
|
linux,phandle = <0x00000065>;
|
|
phandle = <0x00000065>;
|
|
device_type = "daudio2";
|
|
};
|
|
daudio@0x0508f000 {
|
|
compatible = "allwinner,sunxi-daudio";
|
|
reg = <0x00000000 0x0508f000 0x00000000 0x00000074>;
|
|
clocks = <0x00000004 0x00000051>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x00000052>;
|
|
pinctrl-1 = <0x00000053>;
|
|
pcm_lrck_period = <0x00000020>;
|
|
slot_width_select = <0x00000020>;
|
|
daudio_master = <0x00000004>;
|
|
audio_format = <0x00000001>;
|
|
signal_inversion = <0x00000001>;
|
|
tdm_config = <0x00000001>;
|
|
frametype = <0x00000000>;
|
|
tdm_num = <0x00000003>;
|
|
mclk_div = <0x00000001>;
|
|
status = "okay";
|
|
linux,phandle = <0x00000067>;
|
|
phandle = <0x00000067>;
|
|
device_type = "daudio3";
|
|
};
|
|
spdif-controller@0x05093000 {
|
|
compatible = "allwinner,sunxi-spdif";
|
|
reg = <0x00000000 0x05093000 0x00000000 0x00000040>;
|
|
clocks = <0x00000004 0x00000054>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x00000055>;
|
|
pinctrl-1 = <0x00000056>;
|
|
status = "disabled";
|
|
linux,phandle = <0x00000069>;
|
|
phandle = <0x00000069>;
|
|
device_type = "spdif";
|
|
};
|
|
dmic-controller@0x05095000 {
|
|
compatible = "allwinner,sunxi-dmic";
|
|
reg = <0x00000000 0x05095000 0x00000000 0x00000050>;
|
|
clocks = <0x00000004 0x00000057>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x00000058>;
|
|
pinctrl-1 = <0x00000059>;
|
|
status = "disabled";
|
|
linux,phandle = <0x0000006a>;
|
|
phandle = <0x0000006a>;
|
|
device_type = "dmic";
|
|
};
|
|
cpudai0-controller@0x05097000 {
|
|
compatible = "allwinner,sunxi-ahub-cpudai";
|
|
reg = <0x00000000 0x05097000 0x00000000 0x00000adf>;
|
|
id = <0x00000000>;
|
|
status = "okay";
|
|
linux,phandle = <0x0000006b>;
|
|
phandle = <0x0000006b>;
|
|
};
|
|
cpudai1-controller@0x05097000 {
|
|
compatible = "allwinner,sunxi-ahub-cpudai";
|
|
reg = <0x00000000 0x05097000 0x00000000 0x00000adf>;
|
|
id = <0x00000001>;
|
|
status = "okay";
|
|
linux,phandle = <0x0000006c>;
|
|
phandle = <0x0000006c>;
|
|
};
|
|
cpudai2-controller@0x05097000 {
|
|
compatible = "allwinner,sunxi-ahub-cpudai";
|
|
reg = <0x00000000 0x05097000 0x00000000 0x00000adf>;
|
|
id = <0x00000002>;
|
|
status = "okay";
|
|
linux,phandle = <0x0000006d>;
|
|
phandle = <0x0000006d>;
|
|
};
|
|
ahub_codec@0x05097000 {
|
|
compatible = "allwinner,sunxi-ahub";
|
|
reg = <0x00000000 0x05097000 0x00000000 0x00000adf>;
|
|
clocks = <0x00000004 0x0000005a>;
|
|
status = "okay";
|
|
linux,phandle = <0x0000006e>;
|
|
phandle = <0x0000006e>;
|
|
};
|
|
ahub_daudio0@0x05097000 {
|
|
compatible = "allwinner,sunxi-ahub-daudio";
|
|
reg = <0x00000000 0x05097000 0x00000000 0x00000adf>;
|
|
clocks = <0x00000004 0x0000005a>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x0000005b>;
|
|
pinctrl-1 = <0x0000005c>;
|
|
pinconfig = <0x00000001>;
|
|
frametype = <0x00000000>;
|
|
pcm_lrck_period = <0x00000020>;
|
|
slot_width_select = <0x00000020>;
|
|
daudio_master = <0x00000004>;
|
|
audio_format = <0x00000001>;
|
|
signal_inversion = <0x00000001>;
|
|
tdm_config = <0x00000001>;
|
|
tdm_num = <0x00000000>;
|
|
mclk_div = <0x00000000>;
|
|
status = "disabled";
|
|
linux,phandle = <0x00000062>;
|
|
phandle = <0x00000062>;
|
|
device_type = "ahub_daudio0";
|
|
};
|
|
ahub_daudio1@0x05097000 {
|
|
compatible = "allwinner,sunxi-ahub-daudio";
|
|
reg = <0x00000000 0x05097000 0x00000000 0x00000adf>;
|
|
clocks = <0x00000004 0x0000005a>;
|
|
pinconfig = <0x00000000>;
|
|
frametype = <0x00000000>;
|
|
pcm_lrck_period = <0x00000020>;
|
|
slot_width_select = <0x00000020>;
|
|
daudio_master = <0x00000004>;
|
|
audio_format = <0x00000001>;
|
|
signal_inversion = <0x00000001>;
|
|
tdm_config = <0x00000001>;
|
|
tdm_num = <0x00000001>;
|
|
mclk_div = <0x00000001>;
|
|
status = "okay";
|
|
linux,phandle = <0x00000064>;
|
|
phandle = <0x00000064>;
|
|
device_type = "ahub_daudio1";
|
|
};
|
|
ahub_daudio2@0x05097000 {
|
|
compatible = "allwinner,sunxi-ahub-daudio";
|
|
reg = <0x00000000 0x05097000 0x00000000 0x00000adf>;
|
|
clocks = <0x00000004 0x0000005a>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x0000005d>;
|
|
pinctrl-1 = <0x0000005e>;
|
|
pinconfig = <0x00000001>;
|
|
frametype = <0x00000000>;
|
|
pcm_lrck_period = <0x00000020>;
|
|
slot_width_select = <0x00000020>;
|
|
daudio_master = <0x00000004>;
|
|
audio_format = <0x00000001>;
|
|
signal_inversion = <0x00000001>;
|
|
tdm_config = <0x00000001>;
|
|
tdm_num = <0x00000002>;
|
|
mclk_div = <0x00000001>;
|
|
status = "okay";
|
|
linux,phandle = <0x00000066>;
|
|
phandle = <0x00000066>;
|
|
device_type = "ahub_daudio2";
|
|
};
|
|
ahub_daudio3@0x05097000 {
|
|
compatible = "allwinner,sunxi-ahub-daudio";
|
|
reg = <0x00000000 0x05097000 0x00000000 0x00000adf>;
|
|
clocks = <0x00000004 0x0000005a>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x0000005f>;
|
|
pinctrl-1 = <0x00000060>;
|
|
pinconfig = <0x00000001>;
|
|
frametype = <0x00000000>;
|
|
pcm_lrck_period = <0x00000020>;
|
|
slot_width_select = <0x00000020>;
|
|
daudio_master = <0x00000004>;
|
|
audio_format = <0x00000001>;
|
|
signal_inversion = <0x00000001>;
|
|
tdm_config = <0x00000001>;
|
|
tdm_num = <0x00000003>;
|
|
mclk_div = <0x00000004>;
|
|
status = "okay";
|
|
linux,phandle = <0x00000068>;
|
|
phandle = <0x00000068>;
|
|
device_type = "ahub_daudio3";
|
|
};
|
|
sound@0 {
|
|
compatible = "allwinner,sunxi-daudio0-machine";
|
|
sunxi,daudio-controller = <0x00000061>;
|
|
sunxi,cpudai-controller = <0x00000062>;
|
|
status = "disabled";
|
|
device_type = "snddaudio0";
|
|
};
|
|
sound@1 {
|
|
compatible = "allwinner,sunxi-hdmi-machine";
|
|
sunxi,hdmi-controller = <0x00000063>;
|
|
sunxi,cpudai-controller = <0x00000064>;
|
|
status = "okay";
|
|
device_type = "sndhdmi";
|
|
};
|
|
sound@2 {
|
|
compatible = "allwinner,sunxi-daudio2-machine";
|
|
sunxi,daudio-controller = <0x00000065>;
|
|
sunxi,cpudai-controller = <0x00000066>;
|
|
status = "disabled";
|
|
device_type = "snddaudio2";
|
|
};
|
|
sound@3 {
|
|
compatible = "allwinner,sunxi-daudio3-machine";
|
|
sunxi,daudio-controller = <0x00000067>;
|
|
sunxi,cpudai-controller = <0x00000068>;
|
|
sunxi,snddaudio-codec = "acx00-codec";
|
|
sunxi,snddaudio-codec-dai = "acx00-dai";
|
|
status = "okay";
|
|
device_type = "snddaudio3";
|
|
};
|
|
sound@4 {
|
|
compatible = "allwinner,sunxi-spdif-machine";
|
|
sunxi,spdif-controller = <0x00000069>;
|
|
status = "disabled";
|
|
device_type = "sndspdif";
|
|
};
|
|
sound@5 {
|
|
compatible = "allwinner,sunxi-dmic-machine";
|
|
sunxi,dmic-controller = <0x0000006a>;
|
|
status = "disabled";
|
|
device_type = "snddmic";
|
|
};
|
|
sound@6 {
|
|
compatible = "allwinner,sunxi-ahub-machine";
|
|
sunxi,cpudai-controller0 = <0x0000006b>;
|
|
sunxi,cpudai-controller1 = <0x0000006c>;
|
|
sunxi,cpudai-controller2 = <0x0000006d>;
|
|
sunxi,audio-codec = <0x0000006e>;
|
|
status = "okay";
|
|
device_type = "sndahub";
|
|
};
|
|
spi@05010000 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sun50i-spi";
|
|
device_type = "spi0";
|
|
reg = <0x00000000 0x05010000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x0000000a 0x00000004>;
|
|
clocks = <0x00000002 0x0000006f>;
|
|
clock-frequency = <0x05f5e100>;
|
|
pinctrl-names = "default", "sleep";
|
|
spi0_cs_number = <0x00000001>;
|
|
spi0_cs_bitmap = <0x00000001>;
|
|
status = "disabled";
|
|
pinctrl-0 = <0x000000f7 0x000000f8>;
|
|
pinctrl-1 = <0x000000f9 0x000000fa>;
|
|
};
|
|
spi@05011000 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sun50i-spi";
|
|
device_type = "spi1";
|
|
reg = <0x00000000 0x05011000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x0000000b 0x00000004>;
|
|
clocks = <0x00000002 0x00000073>;
|
|
clock-frequency = <0x05f5e100>;
|
|
pinctrl-names = "default", "sleep";
|
|
spi1_cs_number = <0x00000001>;
|
|
spi1_cs_bitmap = <0x00000001>;
|
|
status = "okay";
|
|
pinctrl-0 = <0x000000fb 0x000000fc>;
|
|
pinctrl-1 = <0x000000fd 0x000000fe>;
|
|
spi_board0 {
|
|
device_type = "spi_board0";
|
|
compatible = "spidev";
|
|
spi-max-frequency = <0x00124f80>;
|
|
reg = <0x00000000>;
|
|
};
|
|
};
|
|
pcie@0x05400000 {
|
|
#address-cells = <0x00000003>;
|
|
#size-cells = <0x00000002>;
|
|
compatible = "allwinner,sun50i-pcie";
|
|
reg = <0x00000000 0x05400000 0x00000000 0x00002000 0x00000000 0x05410000 0x00000000 0x00010000>;
|
|
reg-names = "dbi", "config";
|
|
device_type = "pci";
|
|
ranges = <0x00000800 0x00000000 0x05410000 0x00000000 0x05410000 0x00000000 0x00010000 0x81000000 0x00000000 0x00000000 0x00000000 0x05e00000 0x00000000 0x00010000 0x82000000 0x00000000 0x05500000 0x00000000 0x05500000 0x00000000 0x00800000>;
|
|
num-lanes = <0x00000001>;
|
|
interrupts = <0x00000000 0x0000007f 0x00000004 0x00000000 0x0000007e 0x00000004>;
|
|
interrupt-names = "msi";
|
|
clocks = <0x00000077 0x0000000b 0x0000000c 0x00000078 0x00000079 0x0000007a>;
|
|
#interrupt-cells = <0x00000001>;
|
|
interrupt-map-mask = <0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
interrupt-map = <0x00000000 0x00000000 0x00000000 0x00000001 0x00000001 0x00000000 0x0000007f 0x00000004>;
|
|
status = "okay";
|
|
pcie_rest;
|
|
pcie_power = <0x00000087 0x00000003 0x00000011 0x00000001 0xffffffff 0xffffffff 0xffffffff>;
|
|
pcie_reg;
|
|
pcie_iodvdd = <0x00000708>;
|
|
pcie_speed_gen = <0x00000002>;
|
|
pcie_vdd = "vdd_pcie";
|
|
pcie_vdd_vol = <0x000dbba0>;
|
|
pcie_vcc = "vcc-pcie";
|
|
pcie_vcc_vol = <0x001b7740>;
|
|
pcie_vcc_slot = "vcc-pcie-slot";
|
|
pcie_vcc_slot_vol = <0x00325aa0>;
|
|
};
|
|
sdmmc@04022000 {
|
|
compatible = "allwinner,sunxi-mmc-v4p6x";
|
|
device_type = "sdc2";
|
|
reg = <0x00000000 0x04022000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000025 0x00000104>;
|
|
clocks = <0x00000007 0x0000007b 0x0000007c 0x0000007d 0x0000007e>;
|
|
clock-names = "osc24m", "pll_periph", "mmc", "ahb", "rst";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-1 = <0x00000080>;
|
|
bus-width = <0x00000008>;
|
|
max-frequency = <0x02faf080>;
|
|
cap-sd-highspeed;
|
|
cap-mmc-highspeed;
|
|
cap-erase;
|
|
mmc-high-capacity-erase-size;
|
|
no-sdio;
|
|
no-sd;
|
|
sdc_tm4_sm0_freq0 = <0x00000000>;
|
|
sdc_tm4_sm0_freq1 = <0x00000000>;
|
|
sdc_tm4_sm1_freq0 = <0x00000000>;
|
|
sdc_tm4_sm1_freq1 = <0x00000000>;
|
|
sdc_tm4_sm2_freq0 = <0x00000000>;
|
|
sdc_tm4_sm2_freq1 = <0x00000000>;
|
|
sdc_tm4_sm3_freq0 = <0x05000000>;
|
|
sdc_tm4_sm3_freq1 = <0x00000405>;
|
|
sdc_tm4_sm4_freq0 = <0x00050000>;
|
|
sdc_tm4_sm4_freq1 = <0x00000408>;
|
|
status = "okay";
|
|
non-removable;
|
|
pinctrl-0 = <0x00000111>;
|
|
cd-gpios;
|
|
sunxi-power-save-mode;
|
|
sunxi-dis-signal-vol-sw;
|
|
mmc-ddr-1_8v;
|
|
mmc-hs200-1_8v;
|
|
mmc-hs400-1_8v;
|
|
vmmc = "vcc-emmcv";
|
|
vqmmc = "vcc-emmcvq18";
|
|
vdmmc = "none";
|
|
};
|
|
sdmmc@04020000 {
|
|
compatible = "allwinner,sunxi-mmc-v4p1x";
|
|
device_type = "sdc0";
|
|
reg = <0x00000000 0x04020000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000023 0x00000104>;
|
|
clocks = <0x00000007 0x0000007b 0x00000081 0x00000082 0x00000083>;
|
|
clock-names = "osc24m", "pll_periph", "mmc", "ahb", "rst";
|
|
pinctrl-names = "default", "sleep", "uart_jtag";
|
|
pinctrl-1 = <0x00000085>;
|
|
pinctrl-2 = <0x00000086>;
|
|
max-frequency = <0x02faf080>;
|
|
bus-width = <0x00000004>;
|
|
cap-sd-highspeed;
|
|
cap-mmc-highspeed;
|
|
no-sdio;
|
|
no-mmc;
|
|
status = "okay";
|
|
pinctrl-0 = <0x0000010f>;
|
|
cd-gpios = <0x00000087 0x00000005 0x00000006 0x00000000 0x00000001 0x00000002 0xffffffff>;
|
|
sunxi-power-save-mode;
|
|
sunxi-dis-signal-vol-sw;
|
|
vmmc = "vcc-sdcv";
|
|
vqmmc = "vcc-sdcvq33";
|
|
vdmmc = "vcc-sdcvd";
|
|
ctl-spec-caps = <0x00000080>;
|
|
};
|
|
sdmmc@04021000 {
|
|
compatible = "allwinner,sunxi-mmc-v4p1x";
|
|
device_type = "sdc1";
|
|
reg = <0x00000000 0x04021000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000024 0x00000104>;
|
|
clocks = <0x00000007 0x0000007b 0x00000088 0x00000089 0x0000008a>;
|
|
clock-names = "osc24m", "pll_periph", "mmc", "ahb", "rst";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-1 = <0x0000008c>;
|
|
max-frequency = <0x08f0d180>;
|
|
bus-width = <0x00000004>;
|
|
cap-sd-highspeed;
|
|
cap-mmc-highspeed;
|
|
no-mmc;
|
|
sunxi-dly-52M-ddr4 = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000002>;
|
|
sunxi-dly-104M = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000001>;
|
|
sunxi-dly-208M = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000001>;
|
|
status = "okay";
|
|
pinctrl-0 = <0x00000110>;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-ddr50;
|
|
sd-uhs-sdr104;
|
|
cap-sdio-irq;
|
|
keep-power-in-suspend;
|
|
ignore-pm-notify;
|
|
};
|
|
disp@01000000 {
|
|
compatible = "allwinner,sunxi-disp";
|
|
reg = <0x00000000 0x01000000 0x00000000 0x01400000 0x00000000 0x06510000 0x00000000 0x00000100 0x00000000 0x06511000 0x00000000 0x00000800 0x00000000 0x06515000 0x00000000 0x00000800>;
|
|
interrupts = <0x00000000 0x00000041 0x00000104 0x00000000 0x00000042 0x00000104>;
|
|
clocks = <0x0000000a 0x0000008d 0x0000008e 0x00000010>;
|
|
boot_disp = <0x00000000>;
|
|
boot_disp1 = <0x00000000>;
|
|
boot_disp2 = <0x00000000>;
|
|
fb_base = <0x00000000>;
|
|
iommus = <0x00000021 0x00000000 0x00000000>;
|
|
status = "okay";
|
|
device_type = "disp";
|
|
disp_init_enable = <0x00000001>;
|
|
disp_mode = <0x00000000>;
|
|
screen0_output_type = <0x00000003>;
|
|
screen0_output_mode = <0x0000000a>;
|
|
screen0_output_format = <0x00000001>;
|
|
screen0_output_bits = <0x00000000>;
|
|
screen0_output_eotf = <0x00000004>;
|
|
screen0_output_cs = <0x00000101>;
|
|
screen0_output_dvi_hdmi = <0x00000002>;
|
|
screen0_output_range = <0x00000002>;
|
|
screen0_output_scan = <0x00000000>;
|
|
screen0_output_aspect_ratio = <0x00000008>;
|
|
screen1_output_type = <0x00000000>;
|
|
screen1_output_mode = <0x00000002>;
|
|
screen1_output_format = <0x00000001>;
|
|
screen1_output_bits = <0x00000000>;
|
|
screen1_output_eotf = <0x00000004>;
|
|
screen1_output_cs = <0x00000104>;
|
|
screen1_output_dvi_hdmi = <0x00000002>;
|
|
screen1_output_range = <0x00000002>;
|
|
screen1_output_scan = <0x00000000>;
|
|
screen1_output_aspect_ratio = <0x00000008>;
|
|
dev0_output_type = <0x00000004>;
|
|
dev0_output_mode = <0x0000000a>;
|
|
dev0_screen_id = <0x00000000>;
|
|
dev0_do_hpd = <0x00000001>;
|
|
dev1_output_type = <0x00000000>;
|
|
dev1_output_mode = <0x0000000b>;
|
|
dev1_screen_id = <0x00000001>;
|
|
dev1_do_hpd = <0x00000001>;
|
|
dev2_output_type = <0x00000000>;
|
|
def_output_dev = <0x00000000>;
|
|
hdmi_mode_check = <0x00000001>;
|
|
fb0_format = <0x00000000>;
|
|
fb0_width = <0x00000000>;
|
|
fb0_height = <0x00000000>;
|
|
fb1_format = <0x00000000>;
|
|
fb1_width = <0x00000000>;
|
|
fb1_height = <0x00000000>;
|
|
disp_para_zone = <0x00000001>;
|
|
};
|
|
lcd0@01c0c000 {
|
|
compatible = "allwinner,sunxi-lcd0";
|
|
pinctrl-names = "active", "sleep";
|
|
status = "okay";
|
|
device_type = "lcd0";
|
|
lcd_used = <0x00000000>;
|
|
lcd_driver_name = "default_lcd";
|
|
lcd_backlight = <0x00000032>;
|
|
lcd_if = <0x00000003>;
|
|
lcd_x = <0x00000500>;
|
|
lcd_y = <0x00000320>;
|
|
lcd_width = <0x00000096>;
|
|
lcd_height = <0x0000005e>;
|
|
lcd_dclk_freq = <0x00000046>;
|
|
lcd_pwm_used = <0x00000001>;
|
|
lcd_pwm_ch = <0x00000000>;
|
|
lcd_pwm_freq = <0x0000c350>;
|
|
lcd_pwm_pol = <0x00000001>;
|
|
lcd_pwm_max_limit = <0x000000ff>;
|
|
lcd_hbp = <0x00000014>;
|
|
lcd_ht = <0x0000058a>;
|
|
lcd_hspw = <0x0000000a>;
|
|
lcd_vbp = <0x0000000a>;
|
|
lcd_vt = <0x0000032e>;
|
|
lcd_vspw = <0x00000005>;
|
|
lcd_lvds_if = <0x00000000>;
|
|
lcd_lvds_colordepth = <0x00000001>;
|
|
lcd_lvds_mode = <0x00000000>;
|
|
lcd_frm = <0x00000001>;
|
|
lcd_hv_clk_phase = <0x00000000>;
|
|
lcd_hv_sync_polarity = <0x00000000>;
|
|
lcd_gamma_en = <0x00000000>;
|
|
lcd_bright_curve_en = <0x00000000>;
|
|
lcd_cmap_en = <0x00000000>;
|
|
lcd_bl_en = <0x00000087 0x00000003 0x00000017 0x00000001 0x00000000 0xffffffff 0x00000001>;
|
|
lcd_bl_en_power = "none";
|
|
lcd_power = "vcc-lcd-0";
|
|
lcd_fix_power = "vcc-dsi-33";
|
|
pinctrl-0 = <0x00000102>;
|
|
lcd_pin_power = "vcc-pd";
|
|
pinctrl-1 = <0x00000103>;
|
|
};
|
|
lcd1@01c0c001 {
|
|
compatible = "allwinner,sunxi-lcd1";
|
|
pinctrl-names = "active", "sleep";
|
|
status = "okay";
|
|
};
|
|
hdmi@06000000 {
|
|
compatible = "allwinner,sunxi-hdmi";
|
|
reg = <0x00000000 0x06000000 0x00000000 0x00100000>;
|
|
interrupts = <0x00000000 0x00000040 0x00000000>;
|
|
clocks = <0x0000000d 0x0000000e 0x00000011 0x0000000f>;
|
|
pinctrl-names = "ddc_active", "ddc_sleep", "cec_active", "cec_sleep";
|
|
pinctrl-1 = <0x00000090>;
|
|
pinctrl-2 = <0x00000091>;
|
|
pinctrl-3 = <0x00000092>;
|
|
status = "okay";
|
|
device_type = "hdmi";
|
|
hdmi_hdcp_enable = <0x00000000>;
|
|
hdmi_hdcp22_enable = <0x00000000>;
|
|
hdmi_cts_compatibility = <0x00000000>;
|
|
hdmi_cec_support = <0x00000001>;
|
|
hdmi_skip_bootedid = <0x00000001>;
|
|
pinctrl-0 = <0x00000104>;
|
|
ddc_en_io_ctrl = <0x00000001>;
|
|
ddc_io_ctrl = <0x00000087 0x00000007 0x00000002 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
};
|
|
tv0@01c94000 {
|
|
compatible = "allwinner,sunxi-tv";
|
|
reg = <0x00000000 0x01e40000 0x00000000 0x00001000>;
|
|
status = "disabled";
|
|
device_type = "tv0";
|
|
dac_src0 = <0x00000000>;
|
|
dac_type0 = <0x00000000>;
|
|
interface = <0x00000001>;
|
|
};
|
|
tr@01000000 {
|
|
compatible = "allwinner,sun50i-tr";
|
|
reg = <0x00000000 0x01000000 0x00000000 0x000200bc>;
|
|
interrupts = <0x00000000 0x00000060 0x00000104>;
|
|
clocks = <0x0000000a>;
|
|
status = "okay";
|
|
};
|
|
pwm@0300a000 {
|
|
compatible = "allwinner,sunxi-pwm";
|
|
reg = <0x00000000 0x0300a000 0x00000000 0x0000003c>;
|
|
clocks = <0x00000093>;
|
|
pwm-number = <0x00000002>;
|
|
pwm-base = <0x00000000>;
|
|
pwms = <0x00000094 0x00000095>;
|
|
};
|
|
pwm0@0300a000 {
|
|
compatible = "allwinner,sunxi-pwm0";
|
|
pinctrl-names = "active", "sleep";
|
|
reg_base = <0x0300a000>;
|
|
reg_busy_offset = <0x00000000>;
|
|
reg_busy_shift = <0x0000001c>;
|
|
reg_enable_offset = <0x00000000>;
|
|
reg_enable_shift = <0x00000004>;
|
|
reg_clk_gating_offset = <0x00000000>;
|
|
reg_clk_gating_shift = <0x00000006>;
|
|
reg_bypass_offset = <0x00000000>;
|
|
reg_bypass_shift = <0x00000009>;
|
|
reg_pulse_start_offset = <0x00000000>;
|
|
reg_pulse_start_shift = <0x00000008>;
|
|
reg_mode_offset = <0x00000000>;
|
|
reg_mode_shift = <0x00000007>;
|
|
reg_polarity_offset = <0x00000000>;
|
|
reg_polarity_shift = <0x00000005>;
|
|
reg_period_offset = <0x00000004>;
|
|
reg_period_shift = <0x00000010>;
|
|
reg_period_width = <0x00000010>;
|
|
reg_active_offset = <0x00000004>;
|
|
reg_active_shift = <0x00000000>;
|
|
reg_active_width = <0x00000010>;
|
|
reg_prescal_offset = <0x00000000>;
|
|
reg_prescal_shift = <0x00000000>;
|
|
reg_prescal_width = <0x00000004>;
|
|
linux,phandle = <0x00000094>;
|
|
phandle = <0x00000094>;
|
|
device_type = "pwm0";
|
|
pwm_used = <0x00000001>;
|
|
pinctrl-0 = <0x00000107>;
|
|
pinctrl-1 = <0x00000108>;
|
|
};
|
|
pwm1@0300a000 {
|
|
compatible = "allwinner,sunxi-pwm1";
|
|
pinctrl-names = "active", "sleep";
|
|
reg_base = <0x0300a000>;
|
|
reg_busy_offset = <0x00000000>;
|
|
reg_busy_shift = <0x0000001d>;
|
|
reg_enable_offset = <0x00000000>;
|
|
reg_enable_shift = <0x00000013>;
|
|
reg_clk_gating_offset = <0x00000000>;
|
|
reg_clk_gating_shift = <0x00000015>;
|
|
reg_bypass_offset = <0x00000000>;
|
|
reg_bypass_shift = <0x00000018>;
|
|
reg_pulse_start_offset = <0x00000000>;
|
|
reg_pulse_start_shift = <0x00000017>;
|
|
reg_mode_offset = <0x00000000>;
|
|
reg_mode_shift = <0x00000016>;
|
|
reg_polarity_offset = <0x00000000>;
|
|
reg_polarity_shift = <0x00000014>;
|
|
reg_period_offset = <0x00000008>;
|
|
reg_period_shift = <0x00000010>;
|
|
reg_period_width = <0x00000010>;
|
|
reg_active_offset = <0x00000008>;
|
|
reg_active_shift = <0x00000000>;
|
|
reg_active_width = <0x00000010>;
|
|
reg_prescal_offset = <0x00000000>;
|
|
reg_prescal_shift = <0x0000000f>;
|
|
reg_prescal_width = <0x00000004>;
|
|
linux,phandle = <0x00000095>;
|
|
phandle = <0x00000095>;
|
|
device_type = "pwm1";
|
|
pwm_used = <0x00000000>;
|
|
pinctrl-0 = <0x00000109>;
|
|
pinctrl-1 = <0x0000010a>;
|
|
};
|
|
s_pwm@07020c00 {
|
|
compatible = "allwinner,sunxi-s_pwm";
|
|
reg = <0x00000000 0x07020c00 0x00000000 0x0000003c>;
|
|
clocks = <0x00000096>;
|
|
pwm-number = <0x00000001>;
|
|
pwm-base = <0x00000010>;
|
|
pwms = <0x00000097>;
|
|
};
|
|
spwm0@07020c00 {
|
|
compatible = "allwinner,sunxi-pwm16";
|
|
pinctrl-names = "active", "sleep";
|
|
reg_base = <0x07020c00>;
|
|
reg_busy_offset = <0x00000000>;
|
|
reg_busy_shift = <0x0000001c>;
|
|
reg_enable_offset = <0x00000000>;
|
|
reg_enable_shift = <0x00000004>;
|
|
reg_clk_gating_offset = <0x00000000>;
|
|
reg_clk_gating_shift = <0x00000006>;
|
|
reg_bypass_offset = <0x00000000>;
|
|
reg_bypass_shift = <0x00000009>;
|
|
reg_pulse_start_offset = <0x00000000>;
|
|
reg_pulse_start_shift = <0x00000008>;
|
|
reg_mode_offset = <0x00000000>;
|
|
reg_mode_shift = <0x00000007>;
|
|
reg_polarity_offset = <0x00000000>;
|
|
reg_polarity_shift = <0x00000005>;
|
|
reg_period_offset = <0x00000004>;
|
|
reg_period_shift = <0x00000010>;
|
|
reg_period_width = <0x00000010>;
|
|
reg_active_offset = <0x00000004>;
|
|
reg_active_shift = <0x00000000>;
|
|
reg_active_width = <0x00000010>;
|
|
reg_prescal_offset = <0x00000000>;
|
|
reg_prescal_shift = <0x00000000>;
|
|
reg_prescal_width = <0x00000004>;
|
|
linux,phandle = <0x00000097>;
|
|
phandle = <0x00000097>;
|
|
};
|
|
boot_disp {
|
|
compatible = "allwinner,boot_disp";
|
|
device_type = "boot_disp";
|
|
auto_hpd = <0x00000001>;
|
|
output_disp = <0x00000000>;
|
|
output_type = <0x00000003>;
|
|
output_mode = <0x0000000b>;
|
|
hdmi_channel = <0x00000000>;
|
|
hdmi_mode = <0x00000004>;
|
|
};
|
|
ac200 {
|
|
compatible = "allwinner,sunxi-ac200";
|
|
clocks = <0x0000008e>;
|
|
pinctrl-names = "active", "sleep", "ccir_clk_active", "ccir_clk_sleep";
|
|
pinctrl-2 = <0x00000098>;
|
|
pinctrl-3 = <0x00000099>;
|
|
status = "okay";
|
|
device_type = "ac200";
|
|
tv_used = <0x00000001>;
|
|
tv_module_name = "tv_ac200";
|
|
tv_twi_used = <0x00000001>;
|
|
tv_twi_id = <0x00000003>;
|
|
tv_twi_addr = <0x00000010>;
|
|
tv_pwm_ch = <0x00000001>;
|
|
tv_clk_div = <0x00000005>;
|
|
tv_regulator_name = "vcc-audio-33";
|
|
pinctrl-0 = <0x00000105>;
|
|
pinctrl-1 = <0x00000106>;
|
|
};
|
|
vind@0 {
|
|
compatible = "allwinner,sunxi-vin-media", "simple-bus";
|
|
#address-cells = <0x00000002>;
|
|
#size-cells = <0x00000002>;
|
|
ranges;
|
|
device_id = <0x00000000>;
|
|
reg = <0x00000000 0x06620000 0x00000000 0x00001000>;
|
|
clocks = <0x0000009a 0x00000002 0x0000009b 0x00000007 0x00000002>;
|
|
pinctrl-names = "mclk0-default", "mclk0-sleep";
|
|
pinctrl-0 = <0x0000009c>;
|
|
pinctrl-1 = <0x0000009d>;
|
|
status = "disabled";
|
|
device_type = "vind0";
|
|
cci@0x0662e000 {
|
|
compatible = "allwinner,sunxi-csi_cci";
|
|
reg = <0x00000000 0x0662e000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000048 0x00000004>;
|
|
clocks = <0x0000009e>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-1 = <0x000000a0>;
|
|
device_id = <0x00000000>;
|
|
status = "disabled";
|
|
device_type = "csi_cci0";
|
|
pinctrl-0 = <0x0000010e>;
|
|
};
|
|
csi@0x06621000 {
|
|
device_type = "csi0";
|
|
compatible = "allwinner,sunxi-csi";
|
|
reg = <0x00000000 0x06621000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000046 0x00000004>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-1 = <0x000000a2>;
|
|
device_id = <0x00000000>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "disabled";
|
|
pinctrl-0 = <0x0000010d>;
|
|
};
|
|
csi@1 {
|
|
device_type = "csi1";
|
|
compatible = "allwinner,sunxi-csi";
|
|
device_id = <0x00000001>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "disabled";
|
|
};
|
|
mipi@0 {
|
|
compatible = "allwinner,sunxi-mipi";
|
|
device_id = <0x00000000>;
|
|
status = "disabled";
|
|
};
|
|
mipi@1 {
|
|
compatible = "allwinner,sunxi-mipi";
|
|
device_id = <0x00000001>;
|
|
status = "disabled";
|
|
};
|
|
isp@0 {
|
|
compatible = "allwinner,sunxi-isp";
|
|
reg = <0x00000000 0x02100000 0x00000000 0x00000800>;
|
|
interrupts = <0x00000000 0x00000056 0x00000004>;
|
|
device_id = <0x00000000>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "okay";
|
|
linux,phandle = <0x000000a5>;
|
|
phandle = <0x000000a5>;
|
|
};
|
|
isp@1 {
|
|
compatible = "allwinner,sunxi-isp";
|
|
reg = <0x00000000 0x02100800 0x00000000 0x00000800>;
|
|
device_id = <0x00000001>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "disabled";
|
|
linux,phandle = <0x000000a6>;
|
|
phandle = <0x000000a6>;
|
|
};
|
|
scaler@0x02101000 {
|
|
compatible = "allwinner,sunxi-scaler";
|
|
reg = <0x00000000 0x02101000 0x00000000 0x00000400>;
|
|
device_id = <0x00000000>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "okay";
|
|
};
|
|
scaler@0x02101400 {
|
|
compatible = "allwinner,sunxi-scaler";
|
|
reg = <0x00000000 0x02101400 0x00000000 0x00000400>;
|
|
device_id = <0x00000001>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "okay";
|
|
};
|
|
scaler@2 {
|
|
compatible = "allwinner,sunxi-scaler";
|
|
device_id = <0x00000002>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "disabled";
|
|
};
|
|
scaler@3 {
|
|
compatible = "allwinner,sunxi-scaler";
|
|
device_id = <0x00000003>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "disabled";
|
|
};
|
|
actuator@0 {
|
|
device_type = "actuator0";
|
|
compatible = "allwinner,sunxi-actuator";
|
|
actuator0_name = "ad5820_act";
|
|
actuator0_slave = <0x00000018>;
|
|
actuator0_afvdd_vol = <0x002ab980>;
|
|
status = "disabled";
|
|
linux,phandle = <0x000000a4>;
|
|
phandle = <0x000000a4>;
|
|
actuator0_af_pwdn;
|
|
actuator0_afvdd;
|
|
};
|
|
flash@0 {
|
|
device_type = "flash0";
|
|
compatible = "allwinner,sunxi-flash";
|
|
flash0_type = <0x00000002>;
|
|
device_id = <0x00000000>;
|
|
status = "disabled";
|
|
linux,phandle = <0x000000a3>;
|
|
phandle = <0x000000a3>;
|
|
flash0_en;
|
|
flash0_mode;
|
|
flash0_flvdd;
|
|
flash0_flvdd_vol;
|
|
};
|
|
sensor@0 {
|
|
device_type = "sensor0";
|
|
sensor0_mname = "gc2035";
|
|
sensor0_twi_cci_id = <0x00000000>;
|
|
sensor0_twi_addr = <0x00000078>;
|
|
sensor0_pos = "rear";
|
|
sensor0_isp_used = <0x00000000>;
|
|
sensor0_fmt = <0x00000000>;
|
|
sensor0_stby_mode = <0x00000001>;
|
|
sensor0_vflip = <0x00000000>;
|
|
sensor0_hflip = <0x00000000>;
|
|
sensor0_iovdd_vol = <0x002ab980>;
|
|
sensor0_avdd_vol = <0x002ab980>;
|
|
sensor0_dvdd_vol = <0x0016e360>;
|
|
sensor0_power_en;
|
|
flash_handle = <0x000000a3>;
|
|
act_handle = <0x000000a4>;
|
|
status = "disabled";
|
|
linux,phandle = <0x000000a7>;
|
|
phandle = <0x000000a7>;
|
|
sensor0_iovdd;
|
|
sensor0_avdd;
|
|
sensor0_dvdd;
|
|
sensor0_reset = <0x00000087 0x00000003 0x0000000e 0x00000001 0x00000000 0x00000003 0x00000000>;
|
|
sensor0_pwdn = <0x00000087 0x00000003 0x0000000f 0x00000001 0x00000000 0x00000003 0x00000001>;
|
|
};
|
|
sensor@1 {
|
|
device_type = "sensor1";
|
|
sensor1_mname = "ov5647";
|
|
sensor1_twi_cci_id = <0x00000000>;
|
|
sensor1_twi_addr = <0x0000006c>;
|
|
sensor1_pos = "front";
|
|
sensor1_isp_used = <0x00000000>;
|
|
sensor1_fmt = <0x00000000>;
|
|
sensor1_stby_mode = <0x00000001>;
|
|
sensor1_vflip = <0x00000000>;
|
|
sensor1_hflip = <0x00000000>;
|
|
sensor1_iovdd_vol = <0x002ab980>;
|
|
sensor1_avdd_vol = <0x002ab980>;
|
|
sensor1_dvdd_vol = <0x001b7740>;
|
|
flash_handle;
|
|
act_handle;
|
|
status = "disabled";
|
|
linux,phandle = <0x000000a8>;
|
|
phandle = <0x000000a8>;
|
|
sensor1_iovdd;
|
|
sensor1_avdd;
|
|
sensor1_dvdd;
|
|
sensor1_power_en;
|
|
sensor1_reset = <0x00000087 0x00000003 0x0000000e 0x00000001 0x00000000 0x00000003 0x00000000>;
|
|
sensor1_pwdn = <0x00000087 0x00000003 0x0000000f 0x00000001 0x00000000 0x00000003 0x00000001>;
|
|
};
|
|
vinc@0x06623000 {
|
|
device_type = "vinc0";
|
|
compatible = "allwinner,sunxi-vin-core";
|
|
reg = <0x00000000 0x06623000 0x00000000 0x00000100>;
|
|
interrupts = <0x00000000 0x00000043 0x00000004>;
|
|
vinc0_csi_sel = <0x00000000>;
|
|
vinc0_mipi_sel = <0x000000ff>;
|
|
vinc0_isp_sel = <0x00000000>;
|
|
vinc0_sensor_sel = <0x00000000>;
|
|
vinc0_sensor_list = <0x00000000>;
|
|
isp_handle = <0x000000a5 0x000000a6>;
|
|
sensor_handle = <0x000000a7 0x000000a8>;
|
|
device_id = <0x00000000>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "disabled";
|
|
vinc0_rear_sensor_sel = <0x00000000>;
|
|
vinc0_front_sensor_sel = <0x00000001>;
|
|
};
|
|
vinc@0x06623100 {
|
|
device_type = "vinc1";
|
|
compatible = "allwinner,sunxi-vin-core";
|
|
reg = <0x00000000 0x06623100 0x00000000 0x00000100>;
|
|
interrupts = <0x00000000 0x00000044 0x00000004>;
|
|
vinc1_csi_sel = <0x00000000>;
|
|
vinc1_mipi_sel = <0x000000ff>;
|
|
vinc1_isp_sel = <0x00000000>;
|
|
vinc1_sensor_sel = <0x00000001>;
|
|
vinc1_sensor_list = <0x00000000>;
|
|
isp_handle = <0x000000a5 0x000000a6>;
|
|
sensor_handle = <0x000000a7 0x000000a8>;
|
|
device_id = <0x00000001>;
|
|
iommus = <0x00000021 0x00000004 0x00000001>;
|
|
status = "disabled";
|
|
vinc1_rear_sensor_sel = <0x00000000>;
|
|
vinc1_front_sensor_sel = <0x00000001>;
|
|
};
|
|
};
|
|
vdevice@0 {
|
|
compatible = "allwinner,sun50i-vdevice";
|
|
device_type = "Vdevice";
|
|
pinctrl-names = "default";
|
|
test-gpios = <0x00000087 0x00000001 0x00000000 0x00000001 0x00000002 0x00000002 0x00000001>;
|
|
status = "disabled";
|
|
pinctrl-0 = <0x00000115>;
|
|
};
|
|
emce@01905000 {
|
|
compatible = "allwinner,sunxi-emce";
|
|
device_name = "emce";
|
|
reg = <0x00000000 0x01905000 0x00000000 0x00000100>;
|
|
clock-frequency = <0x11e1a300>;
|
|
clocks = <0x000000aa 0x00000023>;
|
|
};
|
|
ce@1904000 {
|
|
compatible = "allwinner,sunxi-ce";
|
|
device_name = "ce";
|
|
reg = <0x00000000 0x01904000 0x00000000 0x000000a0 0x00000000 0x01904800 0x00000000 0x000000a0>;
|
|
interrupts = <0x00000000 0x00000057 0x0000ff01 0x00000000 0x00000058 0x0000ff01>;
|
|
clock-frequency = <0x11e1a300>;
|
|
clocks = <0x000000ab 0x00000023>;
|
|
};
|
|
deinterlace@0x01420000 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sunxi-deinterlace";
|
|
reg = <0x00000000 0x01420000 0x00000000 0x0000020c>;
|
|
interrupts = <0x00000000 0x0000004f 0x00000004>;
|
|
clocks = <0x000000ac 0x00000002>;
|
|
iommus = <0x00000021 0x00000002 0x00000001>;
|
|
status = "okay";
|
|
device_type = "di";
|
|
};
|
|
smartcard@0x05005000 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sunxi-scr";
|
|
device_type = "scr0";
|
|
reg = <0x00000000 0x05005000 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000008 0x00000004>;
|
|
clocks = <0x000000ad 0x000000ae>;
|
|
clock-frequency = <0x016e3600>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x000000af 0x000000b0>;
|
|
pinctrl-1 = <0x000000b1>;
|
|
status = "disabled";
|
|
};
|
|
smartcard@0x05005400 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sunxi-scr";
|
|
device_type = "scr1";
|
|
reg = <0x00000000 0x05005400 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000009 0x00000004>;
|
|
clocks = <0x000000b2 0x000000ae>;
|
|
clock-frequency = <0x016e3600>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x000000b3 0x000000b4>;
|
|
pinctrl-1 = <0x000000b5>;
|
|
status = "disabled";
|
|
};
|
|
pmu@0 {
|
|
interrupts = <0x00000000 0x00000060 0x00000004>;
|
|
status = "okay";
|
|
device_type = "pmu0";
|
|
compatible = "axp806";
|
|
pmu_id = <0x00000003>;
|
|
pmu_irq_wakeup = <0x00000001>;
|
|
pmu_hot_shutdown = <0x00000001>;
|
|
powerkey@0 {
|
|
status = "okay";
|
|
device_type = "powerkey0";
|
|
compatible = "axp806-powerkey";
|
|
pmu_powkey_off_time = <0x00000bb8>;
|
|
pmu_powkey_off_func = <0x00000000>;
|
|
pmu_powkey_off_en = <0x00000001>;
|
|
pmu_powkey_long_time = <0x000005dc>;
|
|
pmu_powkey_on_time = <0x000003e8>;
|
|
};
|
|
regulator@0 {
|
|
status = "okay";
|
|
device_type = "regulator0";
|
|
compatible = "axp806-regulator";
|
|
regulator_count = <0x00000010>;
|
|
regulator1 = "axp806_dcdca none vdd-cpua";
|
|
regulator2 = "axp806_dcdcb none";
|
|
regulator3 = "axp806_dcdcc none vdd-gpu";
|
|
regulator4 = "axp806_dcdcd none vdd-sys vdd-hdmi vdd-pcie vdd-usb";
|
|
regulator5 = "axp806_dcdce none vcc-dram";
|
|
regulator6 = "axp806_aldo1 none vcc-pl vcc-led vcc-ir vcc-pg vcc-pm vcc-ts";
|
|
regulator7 = "axp806_aldo2 none ac-ldoin vcc-audio-33 vcc-ephy usb-dvdd vcc-tv";
|
|
regulator8 = "axp806_aldo3 none vcc-pcie-slot";
|
|
regulator9 = "axp806_bldo1 none vdd-dram-18 vdd-bias vcc-pll";
|
|
regulator10 = "axp806_bldo2 none vcc-emmc-18 vcc-pcie vdd-efuse vcc-hdmi vcc-emmcvq18";
|
|
regulator11 = "axp806_bldo3 none";
|
|
regulator12 = "axp806_bldo4 none";
|
|
regulator13 = "axp806_cldo1 none vcc-io vcc-nand vcc-card vcc-pd vcc-usb vcc-uart vcc-jtagx vcc-emmc-33 vcc-camera-33 vcc-emmcv vcc-sdcv vcc-sdcvq33 vcc-sdcvd";
|
|
regulator14 = "axp806_cldo2 none";
|
|
regulator15 = "axp806_cldo3 none vcc-wifi";
|
|
regulator16 = "axp806_sw none";
|
|
};
|
|
axp_gpio@0 {
|
|
gpio-controller;
|
|
#size-cells = <0x00000000>;
|
|
#gpio-cells = <0x00000006>;
|
|
status = "okay";
|
|
device_type = "axp_pio";
|
|
linux,phandle = <0x000000ff>;
|
|
phandle = <0x000000ff>;
|
|
};
|
|
charger@0 {
|
|
status = "disabled";
|
|
device_type = "charger0";
|
|
pmu_bat_unused = <0x00000001>;
|
|
pmu_pwroff_vol = <0x00000ce4>;
|
|
power_start = <0x00000000>;
|
|
};
|
|
};
|
|
nmi@0x01f00c00 {
|
|
#address-cells = <0x00000001>;
|
|
#size-cells = <0x00000000>;
|
|
compatible = "allwinner,sunxi-nmi";
|
|
reg = <0x00000000 0x01f00c00 0x00000000 0x00000050>;
|
|
nmi_irq_ctrl = <0x0000000c>;
|
|
nmi_irq_en = <0x00000040>;
|
|
nmi_irq_status = <0x00000010>;
|
|
nmi_irq_mask = <0x00000050>;
|
|
status = "okay";
|
|
};
|
|
nand0@04011000 {
|
|
compatible = "allwinner,sun50iw6-nand";
|
|
device_type = "nand0";
|
|
reg = <0x00000000 0x04011000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000022 0x00000004>;
|
|
clocks = <0x00000023 0x000000b6 0x000000b7>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-1 = <0x000000ba>;
|
|
nand0_regulator1 = "vcc-nand";
|
|
nand0_regulator2 = "none";
|
|
nand0_cache_level = <0x55aaaa55>;
|
|
nand0_flush_cache_num = <0x55aaaa55>;
|
|
nand0_capacity_level = <0x55aaaa55>;
|
|
nand0_id_number_ctl = <0x55aaaa55>;
|
|
nand0_print_level = <0x55aaaa55>;
|
|
nand0_p0 = <0x55aaaa55>;
|
|
nand0_p1 = <0x55aaaa55>;
|
|
nand0_p2 = <0x55aaaa55>;
|
|
nand0_p3 = <0x55aaaa55>;
|
|
status = "disabled";
|
|
nand0_support_2ch = <0x00000000>;
|
|
pinctrl-0 = <0x00000100 0x00000101>;
|
|
};
|
|
ts0@05060000 {
|
|
compatible = "allwinner,sun50i-tsc";
|
|
device_type = "ts0";
|
|
reg = <0x00000000 0x05060000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x0000000e 0x00000004>;
|
|
clocks = <0x00000002 0x000000bb>;
|
|
clock-frequency = <0x07270e00>;
|
|
pinctrl-names = "ts0-default", "ts1-default", "ts2-default", "ts3-default", "ts0-sleep", "ts1-sleep", "ts2-sleep", "ts3-sleep";
|
|
pinctrl-0 = <0x000000bc>;
|
|
pinctrl-1 = <0x000000bd>;
|
|
pinctrl-2 = <0x000000be>;
|
|
pinctrl-3 = <0x000000bf>;
|
|
pinctrl-4 = <0x000000c0>;
|
|
pinctrl-5 = <0x000000c1>;
|
|
pinctrl-6 = <0x000000c2>;
|
|
pinctrl-7 = <0x000000c3>;
|
|
ts0config = <0x00000001>;
|
|
ts1config = <0x00000000>;
|
|
ts2config = <0x00000000>;
|
|
ts3config = <0x00000000>;
|
|
status = "okay";
|
|
};
|
|
thermal_sensor {
|
|
compatible = "allwinner,thermal_sensor";
|
|
reg = <0x00000000 0x05070400 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x0000000f 0x00000000>;
|
|
clocks = <0x00000007 0x000000c4>;
|
|
sensor_num = <0x00000002>;
|
|
combine_num = <0x00000002>;
|
|
alarm_low_temp = <0x00019a28>;
|
|
alarm_high_temp = <0x0001adb0>;
|
|
alarm_temp_hysteresis = <0x00003a98>;
|
|
shut_temp = <0x0001c138>;
|
|
status = "okay";
|
|
ths_combine0 {
|
|
compatible = "allwinner,ths_combine0";
|
|
#thermal-sensor-cells = <0x00000001>;
|
|
combine_sensor_num = <0x00000001>;
|
|
combine_sensor_type = "cpu";
|
|
combine_sensor_temp_type = "max";
|
|
combine_sensor_id = <0x00000000>;
|
|
linux,phandle = <0x000000c5>;
|
|
phandle = <0x000000c5>;
|
|
};
|
|
ths_combine1 {
|
|
compatible = "allwinner,ths_combine1";
|
|
#thermal-sensor-cells = <0x00000001>;
|
|
combine_sensor_num = <0x00000001>;
|
|
combine_sensor_type = "gpu";
|
|
combine_sensor_temp_type = "max";
|
|
combine_sensor_id = <0x00000001>;
|
|
linux,phandle = <0x000000cd>;
|
|
phandle = <0x000000cd>;
|
|
};
|
|
};
|
|
cpu_budget_cool {
|
|
device_type = "cpu_budget_cool";
|
|
compatible = "allwinner,budget_cooling";
|
|
#cooling-cells = <0x00000002>;
|
|
status = "okay";
|
|
state_cnt = <0x00000007>;
|
|
cluster_num = <0x00000001>;
|
|
state0 = <0x001b7740 0x00000004>;
|
|
state1 = <0x0016b480 0x00000004>;
|
|
state2 = <0x00142440 0x00000003>;
|
|
state3 = <0x00107ac0 0x00000002>;
|
|
state4 = <0x000d8cc0 0x00000001>;
|
|
state5 = <0x000afc80 0x00000001>;
|
|
state6 = <0x00075300 0x00000001>;
|
|
linux,phandle = <0x000000c7>;
|
|
phandle = <0x000000c7>;
|
|
};
|
|
gpu_cooling {
|
|
compatible = "allwinner,gpu_cooling";
|
|
reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
#cooling-cells = <0x00000002>;
|
|
status = "okay";
|
|
state_cnt = <0x00000004>;
|
|
state0 = <0x00000000>;
|
|
state1 = <0x00000001>;
|
|
state2 = <0x00000002>;
|
|
state3 = <0x00000003>;
|
|
linux,phandle = <0x000000cf>;
|
|
phandle = <0x000000cf>;
|
|
};
|
|
thermal-zones {
|
|
cpu_thermal_zone {
|
|
polling-delay-passive = <0x000003e8>;
|
|
polling-delay = <0x000003e8>;
|
|
thermal-sensors = <0x000000c5 0x00000000>;
|
|
trips {
|
|
t0 {
|
|
temperature = <0x0000ea60>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000c6>;
|
|
phandle = <0x000000c6>;
|
|
};
|
|
t1 {
|
|
temperature = <0x00015f90>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000c8>;
|
|
phandle = <0x000000c8>;
|
|
};
|
|
t2 {
|
|
temperature = <0x00017318>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000c9>;
|
|
phandle = <0x000000c9>;
|
|
};
|
|
t3 {
|
|
temperature = <0x000186a0>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000ca>;
|
|
phandle = <0x000000ca>;
|
|
};
|
|
t4 {
|
|
temperature = <0x00019a28>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000cb>;
|
|
phandle = <0x000000cb>;
|
|
};
|
|
t5 {
|
|
temperature = <0x0001adb0>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000cc>;
|
|
phandle = <0x000000cc>;
|
|
};
|
|
t6 {
|
|
temperature = <0x0001c138>;
|
|
type = "critical";
|
|
hysteresis = <0x00000000>;
|
|
};
|
|
};
|
|
cooling-maps {
|
|
bind0 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000c6>;
|
|
cooling-device = <0x000000c7 0x00000001 0x00000001>;
|
|
};
|
|
bind1 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000c8>;
|
|
cooling-device = <0x000000c7 0x00000002 0x00000002>;
|
|
};
|
|
bind2 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000c9>;
|
|
cooling-device = <0x000000c7 0x00000003 0x00000003>;
|
|
};
|
|
bind3 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000ca>;
|
|
cooling-device = <0x000000c7 0x00000004 0x00000004>;
|
|
};
|
|
bind4 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000cb>;
|
|
cooling-device = <0x000000c7 0x00000005 0x00000005>;
|
|
};
|
|
bind5 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000cc>;
|
|
cooling-device = <0x000000c7 0x00000006 0x00000006>;
|
|
};
|
|
};
|
|
};
|
|
gpu_thermal_zone {
|
|
polling-delay-passive = <0x000003e8>;
|
|
polling-delay = <0x000007d0>;
|
|
thermal-sensors = <0x000000cd 0x00000001>;
|
|
trips {
|
|
t0 {
|
|
temperature = <0x00017318>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000ce>;
|
|
phandle = <0x000000ce>;
|
|
};
|
|
t1 {
|
|
temperature = <0x000186a0>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000d0>;
|
|
phandle = <0x000000d0>;
|
|
};
|
|
t2 {
|
|
temperature = <0x00019a28>;
|
|
type = "passive";
|
|
hysteresis = <0x00000000>;
|
|
linux,phandle = <0x000000d1>;
|
|
phandle = <0x000000d1>;
|
|
};
|
|
t3 {
|
|
temperature = <0x0001c138>;
|
|
type = "critical";
|
|
hysteresis = <0x00000000>;
|
|
};
|
|
};
|
|
cooling-maps {
|
|
bind0 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000ce>;
|
|
cooling-device = <0x000000cf 0x00000001 0x00000001>;
|
|
};
|
|
bind1 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000d0>;
|
|
cooling-device = <0x000000cf 0x00000002 0x00000002>;
|
|
};
|
|
bind2 {
|
|
contribution = <0x00000000>;
|
|
trip = <0x000000d1>;
|
|
cooling-device = <0x000000cf 0x00000003 0x00000003>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
keyboard {
|
|
compatible = "allwinner,keyboard_1200mv";
|
|
reg = <0x00000000 0x05070800 0x00000000 0x00000400>;
|
|
interrupts = <0x00000000 0x00000010 0x00000000>;
|
|
status = "okay";
|
|
key_cnt = <0x00000005>;
|
|
key0 = <0x00000073 0x00000073>;
|
|
key1 = <0x000000eb 0x00000072>;
|
|
key2 = <0x0000014a 0x0000008b>;
|
|
key3 = <0x000001a4 0x0000001c>;
|
|
key4 = <0x00000208 0x00000066>;
|
|
};
|
|
eth@05020000 {
|
|
compatible = "allwinner,sunxi-gmac";
|
|
reg = <0x00000000 0x05020000 0x00000000 0x00010000 0x00000000 0x03000030 0x00000000 0x00000004>;
|
|
interrupts = <0x00000000 0x0000000c 0x00000004>;
|
|
interrupt-names = "gmacirq";
|
|
clocks = <0x000000d2>;
|
|
clock-names = "gmac";
|
|
pinctrl-1 = <0x000000d4>;
|
|
pinctrl-names = "default", "sleep";
|
|
phy-mode = "rgmii";
|
|
tx-delay = <0x00000000>;
|
|
rx-delay = <0x00000000>;
|
|
phy-rst;
|
|
gmac-power0 = "vcc-io";
|
|
gmac-power1 = "axp806_aldo3";
|
|
status = "okay";
|
|
device_type = "gmac0";
|
|
pinctrl-0 = <0x000000e7>;
|
|
gmac-power2;
|
|
};
|
|
wlan {
|
|
compatible = "allwinner,sunxi-wlan";
|
|
clocks = <0x000000d5>;
|
|
status = "okay";
|
|
device_type = "wlan";
|
|
wlan_busnum = <0x00000001>;
|
|
wlan_usbnum = <0x00000003>;
|
|
wlan_io_regulator = "axp806_bldo3";
|
|
wlan_regon = <0x000000d6 0x0000000c 0x00000003 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
wlan_hostwake = <0x000000d6 0x0000000c 0x00000000 0x00000000 0xffffffff 0xffffffff 0x00000000>;
|
|
};
|
|
bt {
|
|
compatible = "allwinner,sunxi-bt";
|
|
clocks = <0x000000d5>;
|
|
bt_power = "vcc-wifi";
|
|
bt_io_regulator = "vcc-wifi-io";
|
|
status = "okay";
|
|
device_type = "bt";
|
|
bt_rst_n = <0x000000d6 0x0000000c 0x00000004 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
};
|
|
btlpm {
|
|
compatible = "allwinner,sunxi-btlpm";
|
|
uart_index = <0x00000001>;
|
|
status = "okay";
|
|
device_type = "btlpm";
|
|
bt_hostwake_enable = <0x00000001>;
|
|
bt_wake = <0x000000d6 0x0000000c 0x00000002 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
bt_hostwake = <0x000000d6 0x0000000c 0x00000001 0x00000000 0xffffffff 0xffffffff 0x00000000>;
|
|
};
|
|
product {
|
|
device_type = "product";
|
|
version = "100";
|
|
machine = "petrel-p1";
|
|
};
|
|
platform {
|
|
device_type = "platform";
|
|
eraseflag = <0x00000001>;
|
|
};
|
|
target {
|
|
device_type = "target";
|
|
boot_clock = <0x00000528>;
|
|
storage_type = <0xffffffff>;
|
|
burn_key = <0x00000000>;
|
|
dragonboard_test = <0x00000000>;
|
|
power_mode = <0x00000000>;
|
|
advert_enable = <0x00000000>;
|
|
};
|
|
secure {
|
|
device_type = "secure";
|
|
dram_region_mbytes = <0x00000040>;
|
|
drm_region_mbytes = <0x00000000>;
|
|
drm_region_start_mbytes = <0x00000000>;
|
|
};
|
|
power_sply {
|
|
device_type = "power_sply";
|
|
dcdca_vol = <0x000f4628>;
|
|
aldo2_vol = <0x000f4f24>;
|
|
bldo3_vol = <0x000f4948>;
|
|
cldo2_vol = <0x000f4f24>;
|
|
cldo3_vol = <0x000f4f24>;
|
|
};
|
|
gpio_bias {
|
|
device_type = "gpio_bias";
|
|
pc_bias = "axp806:bldo2:1800";
|
|
pg_bias = "axp806:bldo3:1800";
|
|
};
|
|
ir_boot_recovery {
|
|
device_type = "ir_boot_recovery";
|
|
status = "disabled";
|
|
ir_work_mode = <0x00000001>;
|
|
ir_press_times = <0x00000001>;
|
|
ir_detect_time = <0x000007d0>;
|
|
ir_recovery_key_code0 = <0x00000057>;
|
|
ir_addr_code0 = <0x00009f00>;
|
|
};
|
|
card_boot {
|
|
device_type = "card_boot";
|
|
logical_start = <0x0000a000>;
|
|
sprite_gpio0 = <0x000000d6 0x0000000b 0x00000004 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
next_work = <0x00000003>;
|
|
};
|
|
key_boot_recovery {
|
|
device_type = "key_boot_recovery";
|
|
status = "disabled";
|
|
press_mode_enable = <0x00000000>;
|
|
key_work_mode = <0x00000001>;
|
|
short_press_mode = <0x00000000>;
|
|
long_press_mode = <0x00000001>;
|
|
key_press_time = <0x000007d0>;
|
|
recovery_key = <0x00000087 0x00000007 0x00000007 0x00000000 0xffffffff 0xffffffff 0xffffffff>;
|
|
};
|
|
boot_init_gpio {
|
|
device_type = "boot_init_gpio";
|
|
status = "okay";
|
|
gpio0 = <0x000000d6 0x0000000b 0x00000004 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
gpio1 = <0x000000d6 0x0000000b 0x00000007 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
gpio2 = <0x00000087 0x00000007 0x00000002 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
};
|
|
pm_para {
|
|
device_type = "pm_para";
|
|
standby_mode = <0x00000001>;
|
|
};
|
|
card0_boot_para {
|
|
device_type = "card0_boot_para";
|
|
card_ctrl = <0x00000000>;
|
|
card_high_speed = <0x00000001>;
|
|
card_line = <0x00000004>;
|
|
pinctrl-0 = <0x000000e2>;
|
|
};
|
|
card2_boot_para {
|
|
device_type = "card2_boot_para";
|
|
card_ctrl = <0x00000002>;
|
|
card_high_speed = <0x00000001>;
|
|
card_line = <0x00000008>;
|
|
pinctrl-0 = <0x000000e3>;
|
|
sdc_ex_dly_used = <0x00000002>;
|
|
sdc_io_1v8 = <0x00000001>;
|
|
sdc_tm4_hs400_max_freq = <0x00000064>;
|
|
sdc_tm4_hs200_max_freq = <0x00000096>;
|
|
};
|
|
twi_para {
|
|
device_type = "twi_para";
|
|
twi_port = <0x00000000>;
|
|
pinctrl-0 = <0x000000e4>;
|
|
};
|
|
uart_para {
|
|
device_type = "uart_para";
|
|
uart_debug_port = <0x00000000>;
|
|
pinctrl-0 = <0x000000e5>;
|
|
};
|
|
jtag_para {
|
|
device_type = "jtag_para";
|
|
jtag_enable = <0x00000000>;
|
|
pinctrl-0 = <0x000000e6>;
|
|
};
|
|
clock {
|
|
device_type = "clock";
|
|
pll4 = <0x0000012c>;
|
|
pll6 = <0x00000258>;
|
|
pll8 = <0x00000168>;
|
|
pll9 = <0x00000129>;
|
|
pll10 = <0x00000108>;
|
|
};
|
|
rtp_para {
|
|
device_type = "rtp_para";
|
|
rtp_used = <0x00000000>;
|
|
rtp_screen_size = <0x00000005>;
|
|
rtp_regidity_level = <0x00000005>;
|
|
rtp_press_threshold_enable = <0x00000000>;
|
|
rtp_press_threshold = <0x00001f40>;
|
|
rtp_sensitive_level = <0x0000000f>;
|
|
rtp_exchange_x_y_flag = <0x00000000>;
|
|
};
|
|
ctp {
|
|
device_type = "ctp";
|
|
compatible = "allwinner,sun50i-ctp-para";
|
|
status = "disabled";
|
|
ctp_twi_id = <0x00000000>;
|
|
ctp_twi_addr = <0x0000005d>;
|
|
ctp_screen_max_x = <0x00000500>;
|
|
ctp_screen_max_y = <0x00000320>;
|
|
ctp_revert_x_flag = <0x00000001>;
|
|
ctp_revert_y_flag = <0x00000001>;
|
|
ctp_exchange_x_y_flag = <0x00000001>;
|
|
ctp_int_port = <0x00000087 0x00000007 0x00000004 0x00000006 0xffffffff 0xffffffff 0xffffffff>;
|
|
ctp_wakeup = <0x00000087 0x00000007 0x00000008 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
ctp_power_ldo = "vcc-ctp";
|
|
ctp_power_ldo_vol = <0x00000ce4>;
|
|
ctp_power_io;
|
|
};
|
|
ctp_list {
|
|
device_type = "ctp_list";
|
|
compatible = "allwinner,sun50i-ctp-list";
|
|
ctp_det_used = <0x00000000>;
|
|
ft5x_ts = <0x00000001>;
|
|
gt82x = <0x00000001>;
|
|
gslX680 = <0x00000001>;
|
|
gt9xx_ts = <0x00000000>;
|
|
gt9xxnew_ts = <0x00000001>;
|
|
gt811 = <0x00000001>;
|
|
zet622x = <0x00000001>;
|
|
aw5306_ts = <0x00000001>;
|
|
};
|
|
tkey_para {
|
|
device_type = "tkey_para";
|
|
tkey_used = <0x00000000>;
|
|
tkey_twi_id;
|
|
tkey_twi_addr;
|
|
tkey_int;
|
|
};
|
|
motor_para {
|
|
device_type = "motor_para";
|
|
motor_used = <0x00000001>;
|
|
motor_shake = <0x000000ff 0x0000fffe 0x00000003 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
};
|
|
esm {
|
|
device_type = "esm";
|
|
esm_img_size_addr = <0x00000000>;
|
|
esm_img_buff_addr = <0x00000000>;
|
|
};
|
|
pwm16 {
|
|
device_type = "pwm16";
|
|
s_pwm0_used = <0x00000001>;
|
|
pinctrl-0 = <0x0000010b>;
|
|
pinctrl-1 = <0x0000010c>;
|
|
};
|
|
tvout_para {
|
|
device_type = "tvout_para";
|
|
tvout_used;
|
|
tvout_channel_num;
|
|
tv_en;
|
|
};
|
|
tvin_para {
|
|
device_type = "tvin_para";
|
|
tvin_used;
|
|
tvin_channel_num;
|
|
};
|
|
smc {
|
|
device_type = "smc";
|
|
smc_used;
|
|
smc_rst;
|
|
smc_vppen;
|
|
smc_vppp;
|
|
smc_det;
|
|
smc_vccen;
|
|
smc_sck;
|
|
smc_sda;
|
|
};
|
|
gpio_para {
|
|
device_type = "gpio_para";
|
|
compatible = "allwinner,sunxi-init-gpio";
|
|
gpio_used = <0x00000001>;
|
|
gpio_num = <0x00000003>;
|
|
gpio_pin_1 = <0x000000d6 0x0000000b 0x00000007 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
gpio_pin_2 = <0x000000d6 0x0000000b 0x00000004 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
gpio_pin_3 = <0x00000087 0x00000003 0x00000006 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
normal_led = "gpio_pin_1";
|
|
standby_led = "gpio_pin_2";
|
|
easy_light_used = <0x00000001>;
|
|
normal_led_light = <0x00000001>;
|
|
standby_led_light = <0x00000001>;
|
|
};
|
|
usbc3 {
|
|
device_type = "usbc3";
|
|
status = "okay";
|
|
usb_drv_vbus_gpio;
|
|
usb_host_init_state = <0x00000001>;
|
|
usb_regulator_io = "nocare";
|
|
usb_wakeup_suspend = <0x00000000>;
|
|
};
|
|
serial_feature {
|
|
device_type = "serial_feature";
|
|
sn_filename = "sn.txt";
|
|
};
|
|
gsensor {
|
|
device_type = "gsensor";
|
|
compatible = "allwinner,sun50i-gsensor-para";
|
|
status = "disabled";
|
|
gsensor_twi_id = <0x00000001>;
|
|
gsensor_twi_addr = <0x00000018>;
|
|
gsensor_int1 = <0x00000087 0x00000000 0x00000009 0x00000006 0x00000001 0xffffffff 0xffffffff>;
|
|
gsensor_int2;
|
|
gsensor_vcc_io = "vcc-deviceio";
|
|
gsensor_vcc_io_val = <0x00000c1c>;
|
|
};
|
|
gsensor_list_para {
|
|
device_type = "gsensor_list_para";
|
|
compatible = "allwinner,sun50i-gsensor-list-para";
|
|
gsensor_det_used = <0x00000000>;
|
|
lsm9ds0_acc_mag = <0x00000001>;
|
|
bma250 = <0x00000001>;
|
|
mma8452 = <0x00000001>;
|
|
mma7660 = <0x00000001>;
|
|
mma865x = <0x00000001>;
|
|
afa750 = <0x00000001>;
|
|
lis3de_acc = <0x00000001>;
|
|
lis3dh_acc = <0x00000001>;
|
|
kxtik = <0x00000001>;
|
|
dmard10 = <0x00000000>;
|
|
dmard06 = <0x00000001>;
|
|
mxc622x = <0x00000001>;
|
|
fxos8700 = <0x00000001>;
|
|
lsm303d = <0x00000000>;
|
|
};
|
|
3g_para {
|
|
device_type = "3g_para";
|
|
3g_used = <0x00000000>;
|
|
3g_usbc_num = <0x00000002>;
|
|
3g_uart_num = <0x00000000>;
|
|
bb_vbat = <0x000000d6 0x0000000b 0x00000003 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
bb_host_wake = <0x000000d6 0x0000000c 0x00000000 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
bb_on = <0x000000d6 0x0000000c 0x00000001 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
bb_pwr_on = <0x000000d6 0x0000000c 0x00000003 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
bb_wake = <0x000000d6 0x0000000c 0x00000004 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
bb_rf_dis = <0x000000d6 0x0000000c 0x00000005 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
bb_rst = <0x000000d6 0x0000000c 0x00000006 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
3g_int;
|
|
};
|
|
gy_para {
|
|
device_type = "gy_para";
|
|
compatible = "allwinner,sun50i-gyr_sensors-para";
|
|
gy_used = <0x00000000>;
|
|
gy_twi_id = <0x00000002>;
|
|
gy_twi_addr = <0x0000006a>;
|
|
gy_int1 = <0x00000087 0x00000000 0x0000000a 0x00000006 0x00000001 0xffffffff 0xffffffff>;
|
|
gy_int2;
|
|
};
|
|
gy_list_para {
|
|
device_type = "gy_list_para";
|
|
compatible = "allwinner,sun50i-gyr_sensors-list-para";
|
|
gy_det_used = <0x00000001>;
|
|
lsm9ds0_gyr = <0x00000001>;
|
|
l3gd20_gyr = <0x00000000>;
|
|
bmg160_gyr = <0x00000001>;
|
|
};
|
|
ls_para {
|
|
device_type = "ls_para";
|
|
compatible = "allwinner,sun50i-lsensors-para";
|
|
ls_used = <0x00000000>;
|
|
ls_twi_id = <0x00000002>;
|
|
ls_twi_addr = <0x00000023>;
|
|
ls_int = <0x00000087 0x00000000 0x0000000c 0x00000006 0x00000001 0xffffffff 0xffffffff>;
|
|
};
|
|
ls_list_para {
|
|
device_type = "ls_list_para";
|
|
compatible = "allwinner,sun50i-lsensors-list-para";
|
|
ls_det_used = <0x00000001>;
|
|
ltr_501als = <0x00000001>;
|
|
jsa1212 = <0x00000000>;
|
|
jsa1127 = <0x00000001>;
|
|
};
|
|
compass_para {
|
|
device_type = "compass_para";
|
|
compatible = "allwinner,sun50i-compass-para";
|
|
compass_used = <0x00000000>;
|
|
compass_twi_id = <0x00000002>;
|
|
compass_twi_addr = <0x0000000d>;
|
|
compass_int = <0x00000087 0x00000000 0x0000000b 0x00000006 0x00000001 0xffffffff 0xffffffff>;
|
|
};
|
|
compass_list_para {
|
|
device_type = "compass_list_para";
|
|
compatible = "allwinner,sun50i-compass-list-para";
|
|
compass_det_used = <0x00000001>;
|
|
lsm9ds0 = <0x00000001>;
|
|
lsm303d = <0x00000000>;
|
|
akm8963 = <0x00000001>;
|
|
};
|
|
dvfs_table_0 {
|
|
device_type = "dvfs_table_0";
|
|
max_freq = <0x6b49d200>;
|
|
min_freq = <0x1c9c3800>;
|
|
lv_count = <0x00000008>;
|
|
lv1_freq = <0x6b49d200>;
|
|
lv1_volt = <0x00000488>;
|
|
lv2_freq = <0x58b11400>;
|
|
lv2_volt = <0x00000424>;
|
|
lv3_freq = <0x4ead9a00>;
|
|
lv3_volt = <0x000003e8>;
|
|
lv4_freq = "@_~";
|
|
lv4_volt = <0x000003ac>;
|
|
lv5_freq = <0x34edce00>;
|
|
lv5_volt = <0x00000370>;
|
|
lv6_freq = <0x00000000>;
|
|
lv6_volt = <0x00000370>;
|
|
lv7_freq = <0x00000000>;
|
|
lv7_volt = <0x00000370>;
|
|
lv8_freq = <0x00000000>;
|
|
lv8_volt = <0x00000370>;
|
|
};
|
|
dvfs_table_1 {
|
|
device_type = "dvfs_table_1";
|
|
max_freq = <0x6b49d200>;
|
|
min_freq = <0x1c9c3800>;
|
|
lv_count = <0x00000008>;
|
|
lv1_freq = <0x6b49d200>;
|
|
lv1_volt = <0x0000044c>;
|
|
lv2_freq = <0x58b11400>;
|
|
lv2_volt = <0x000003e8>;
|
|
lv3_freq = <0x4ead9a00>;
|
|
lv3_volt = <0x000003ac>;
|
|
lv4_freq = "@_~";
|
|
lv4_volt = <0x00000370>;
|
|
lv5_freq = <0x34edce00>;
|
|
lv5_volt = <0x00000334>;
|
|
lv6_freq = <0x00000000>;
|
|
lv6_volt = <0x00000334>;
|
|
lv7_freq = <0x00000000>;
|
|
lv7_volt = <0x00000334>;
|
|
lv8_freq = <0x00000000>;
|
|
lv8_volt = <0x00000334>;
|
|
};
|
|
dvfs_table_2 {
|
|
device_type = "dvfs_table_2";
|
|
max_freq = <0x6b49d200>;
|
|
min_freq = <0x1c9c3800>;
|
|
lv_count = <0x00000008>;
|
|
lv1_freq = <0x6b49d200>;
|
|
lv1_volt = <0x0000044c>;
|
|
lv2_freq = <0x58b11400>;
|
|
lv2_volt = <0x000003e8>;
|
|
lv3_freq = <0x4ead9a00>;
|
|
lv3_volt = <0x000003ac>;
|
|
lv4_freq = "@_~";
|
|
lv4_volt = <0x00000370>;
|
|
lv5_freq = <0x34edce00>;
|
|
lv5_volt = <0x00000334>;
|
|
lv6_freq = <0x00000000>;
|
|
lv6_volt = <0x00000334>;
|
|
lv7_freq = <0x00000000>;
|
|
lv7_volt = <0x00000334>;
|
|
lv8_freq = <0x00000000>;
|
|
lv8_volt = <0x00000334>;
|
|
};
|
|
s_rsb0 {
|
|
device_type = "s_rsb0";
|
|
status = "disabled";
|
|
pinctrl-0 = <0x00000113>;
|
|
};
|
|
box_standby_led {
|
|
device_type = "box_standby_led";
|
|
gpio0 = <0x000000d6 0x0000000b 0x00000007 0x00000001 0xffffffff 0xffffffff 0x00000000>;
|
|
gpio1 = <0x000000d6 0x0000000b 0x00000004 0x00000001 0xffffffff 0xffffffff 0x00000001>;
|
|
};
|
|
gpio_power_key {
|
|
device_type = "gpio_power_key";
|
|
compatible = "allwinner,sunxi-gpio-power-key";
|
|
status = "disabled";
|
|
key_io = <0x000000d6 0x0000000b 0x00000005 0x00000000 0xffffffff 0xffffffff 0x00000000>;
|
|
trigger_mode = <0x00000001>;
|
|
};
|
|
};
|
|
aliases {
|
|
serial0 = "/soc@03000000/uart@05000000", "/soc@03000000/uart@05000000";
|
|
serial1 = "/soc@03000000/uart@05000400", "/soc@03000000/uart@05000400";
|
|
serial2 = "/soc@03000000/uart@05000800", "/soc@03000000/uart@05000800";
|
|
serial3 = "/soc@03000000/uart@05000c00", "/soc@03000000/uart@05000c00";
|
|
twi0 = "/soc@03000000/twi@0x05002000", "/soc@03000000/twi@0x05002000";
|
|
twi1 = "/soc@03000000/twi@0x05002400", "/soc@03000000/twi@0x05002400";
|
|
twi2 = "/soc@03000000/twi@0x05002800", "/soc@03000000/twi@0x05002800";
|
|
twi3 = "/soc@03000000/twi@0x05002c00", "/soc@03000000/twi@0x05002c00";
|
|
spi0 = "/soc@03000000/spi@05010000", "/soc@03000000/spi@05010000";
|
|
spi1 = "/soc@03000000/spi@05011000", "/soc@03000000/spi@05011000";
|
|
pcie = "/soc@03000000/pcie@0x05400000", "/soc@03000000/pcie@0x05400000";
|
|
scr0 = "/soc@03000000/smartcard@0x05005000", "/soc@03000000/smartcard@0x05005000";
|
|
scr1 = "/soc@03000000/smartcard@0x05005400", "/soc@03000000/smartcard@0x05005400";
|
|
gmac0 = "/soc@03000000/eth@05020000", "/soc@03000000/eth@05020000";
|
|
global_timer0 = "/soc@03000000/timer@03009000", "/soc@03000000/timer@03009000";
|
|
mmc0 = "/soc@03000000/sdmmc@04020000", "/soc@03000000/sdmmc@04020000";
|
|
mmc2 = "/soc@03000000/sdmmc@04022000", "/soc@03000000/sdmmc@04022000";
|
|
nand0 = "/soc@03000000/nand0@04011000", "/soc@03000000/nand0@04011000";
|
|
disp = "/soc@03000000/disp@01000000", "/soc@03000000/disp@01000000";
|
|
lcd0 = "/soc@03000000/lcd0@01c0c000", "/soc@03000000/lcd0@01c0c000";
|
|
lcd1 = "/soc@03000000/lcd1@01c0c001", "/soc@03000000/lcd1@01c0c001";
|
|
hdmi = "/soc@03000000/hdmi@06000000", "/soc@03000000/hdmi@06000000";
|
|
pwm = "/soc@03000000/pwm@0300a000", "/soc@03000000/pwm@0300a000";
|
|
pwm0 = "/soc@03000000/pwm0@0300a000", "/soc@03000000/pwm0@0300a000";
|
|
pwm1 = "/soc@03000000/pwm1@0300a000", "/soc@03000000/pwm1@0300a000";
|
|
tv0 = "/soc@03000000/tv0@01c94000", "/soc@03000000/tv0@01c94000";
|
|
s_pwm = "/soc@03000000/s_pwm@07020c00", "/soc@03000000/s_pwm@07020c00";
|
|
spwm0 = "/soc@03000000/spwm0@07020c00", "/soc@03000000/spwm0@07020c00";
|
|
ac200 = "/soc@03000000/ac200", "/soc@03000000/ac200";
|
|
boot_disp = "/soc@03000000/boot_disp", "/soc@03000000/boot_disp";
|
|
charger0 = "/soc@03000000/pmu@0/charger@0", "/soc@03000000/pmu@0/charger@0";
|
|
regulator0 = "/soc@03000000/pmu@0/regulator@0", "/soc@03000000/pmu@0/regulator@0";
|
|
};
|
|
chosen {
|
|
bootargs = "earlyprintk=sunxi-uart,0x05000000 loglevel=8 initcall_debug=1 console=ttyS0 init=/init";
|
|
linux,initrd-start = <0x00000000 0x00000000>;
|
|
linux,initrd-end = <0x00000000 0x00000000>;
|
|
};
|
|
firmware {
|
|
android {
|
|
compatible = "android,firmware";
|
|
boot_devices = "soc/sdc0,soc/sdc2,soc";
|
|
fstab {
|
|
compatible = "android,fstab";
|
|
vendor {
|
|
compatible = "android,vendor";
|
|
dev = "/dev/block/by-name/vendor";
|
|
fsmgr_flags = "wait,recoveryonly";
|
|
mnt_flags = "ro,barrier=1";
|
|
status = "ok";
|
|
type = "ext4";
|
|
};
|
|
};
|
|
};
|
|
optee {
|
|
compatible = "linaro,optee-tz";
|
|
method = "smc";
|
|
};
|
|
};
|
|
cpus {
|
|
#address-cells = <0x00000002>;
|
|
#size-cells = <0x00000000>;
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a53", "arm,armv8";
|
|
reg = <0x00000000 0x00000000>;
|
|
enable-method = "psci";
|
|
clocks = <0x000000d7>;
|
|
clock-latency = <0x001e8480>;
|
|
clock-frequency = <0x4ead9a00>;
|
|
operating-points-v2 = <0x000000d8 0x000000d9 0x000000da>;
|
|
cpu-idle-states = <0x000000db 0x000000dc 0x000000dd>;
|
|
};
|
|
cpu@1 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a53", "arm,armv8";
|
|
reg = <0x00000000 0x00000001>;
|
|
enable-method = "psci";
|
|
clocks = <0x000000d7>;
|
|
clock-frequency = <0x4ead9a00>;
|
|
operating-points-v2 = <0x000000d8 0x000000d9 0x000000da>;
|
|
cpu-idle-states = <0x000000db 0x000000dc 0x000000dd>;
|
|
};
|
|
cpu@2 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a53", "arm,armv8";
|
|
reg = <0x00000000 0x00000002>;
|
|
enable-method = "psci";
|
|
clocks = <0x000000d7>;
|
|
clock-frequency = <0x4ead9a00>;
|
|
operating-points-v2 = <0x000000d8 0x000000d9 0x000000da>;
|
|
cpu-idle-states = <0x000000db 0x000000dc 0x000000dd>;
|
|
};
|
|
cpu@3 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a53", "arm,armv8";
|
|
reg = <0x00000000 0x00000003>;
|
|
enable-method = "psci";
|
|
clocks = <0x000000d7>;
|
|
clock-frequency = <0x4ead9a00>;
|
|
operating-points-v2 = <0x000000d8 0x000000d9 0x000000da>;
|
|
cpu-idle-states = <0x000000db 0x000000dc 0x000000dd>;
|
|
};
|
|
idle-states {
|
|
entry-method = "arm,psci";
|
|
cpu-sleep-0 {
|
|
compatible = "arm,idle-state";
|
|
arm,psci-suspend-param = <0x00010000>;
|
|
entry-latency-us = <0x00000fa0>;
|
|
exit-latency-us = <0x00002710>;
|
|
min-residency-us = <0x00003a98>;
|
|
linux,phandle = <0x000000db>;
|
|
phandle = <0x000000db>;
|
|
};
|
|
cluster-sleep-0 {
|
|
compatible = "arm,idle-state";
|
|
arm,psci-suspend-param = <0x01010000>;
|
|
entry-latency-us = <0x0000c350>;
|
|
exit-latency-us = <0x000186a0>;
|
|
min-residency-us = <0x0003d090>;
|
|
linux,phandle = <0x000000dc>;
|
|
phandle = <0x000000dc>;
|
|
};
|
|
sys-sleep-0 {
|
|
compatible = "arm,idle-state";
|
|
arm,psci-suspend-param = <0x02010000>;
|
|
entry-latency-us = <0x000186a0>;
|
|
exit-latency-us = <0x001e8480>;
|
|
min-residency-us = <0x0044aa20>;
|
|
linux,phandle = <0x000000dd>;
|
|
phandle = <0x000000dd>;
|
|
};
|
|
};
|
|
};
|
|
psci {
|
|
compatible = "arm,psci-0.2";
|
|
method = "smc";
|
|
psci_version = <0x84000000>;
|
|
cpu_suspend = <0xc4000001>;
|
|
cpu_off = <0x84000002>;
|
|
cpu_on = <0xc4000003>;
|
|
affinity_info = <0xc4000004>;
|
|
migrate = <0xc4000005>;
|
|
migrate_info_type = <0x84000006>;
|
|
migrate_info_up_cpu = <0xc4000007>;
|
|
system_off = <0x84000008>;
|
|
system_reset = <0x84000009>;
|
|
};
|
|
n_brom {
|
|
compatible = "allwinner,n-brom";
|
|
reg = <0x00000000 0x00000000 0x00000000 0x0000a000>;
|
|
};
|
|
s_brom {
|
|
compatible = "allwinner,s-brom";
|
|
reg = <0x00000000 0x00000000 0x00000000 0x00010000>;
|
|
};
|
|
sram_ctrl {
|
|
device_type = "sram_ctrl";
|
|
compatible = "allwinner,sram_ctrl";
|
|
reg = <0x00000000 0x03000000 0x00000000 0x00000100>;
|
|
};
|
|
sram_a1 {
|
|
compatible = "allwinner,sram_a1";
|
|
reg = <0x00000000 0x00020000 0x00000000 0x00008000>;
|
|
};
|
|
sram_a2 {
|
|
compatible = "allwinner,sram_a2";
|
|
reg = <0x00000000 0x00100000 0x00000000 0x00014000>;
|
|
};
|
|
prcm {
|
|
compatible = "allwinner,prcm";
|
|
reg = <0x00000000 0x01f01400 0x00000000 0x00000400>;
|
|
};
|
|
s_cpuscfg {
|
|
compatible = "allwinner,s_cpuscfg";
|
|
reg = <0x00000000 0x01f01c00 0x00000000 0x00000400>;
|
|
};
|
|
ion {
|
|
compatible = "allwinner,sunxi-ion";
|
|
heap_sys_user@0 {
|
|
compatible = "allwinner,sys_user";
|
|
heap-name = "sys_user";
|
|
heap-id = <0x00000000>;
|
|
heap-base = <0x00000000>;
|
|
heap-size = <0x00000000>;
|
|
heap-type = "ion_system";
|
|
};
|
|
heap_sys_contig@0 {
|
|
compatible = "allwinner,sys_contig";
|
|
heap-name = "sys_contig";
|
|
heap-id = <0x00000001>;
|
|
heap-base = <0x00000000>;
|
|
heap-size = <0x00000000>;
|
|
heap-type = "ion_contig";
|
|
};
|
|
heap_cma@0 {
|
|
compatible = "allwinner,cma";
|
|
heap-name = "cma";
|
|
heap-id = <0x00000004>;
|
|
heap-base = <0x00000000>;
|
|
heap-size = <0x00000000>;
|
|
heap-type = "ion_cma";
|
|
};
|
|
heap_secure@0 {
|
|
compatible = "allwinner,secure";
|
|
heap-name = "secure";
|
|
heap-id = <0x00000006>;
|
|
heap-base = <0x00000000>;
|
|
heap-size = <0x00000000>;
|
|
heap-type = "ion_secure";
|
|
};
|
|
};
|
|
dram {
|
|
compatible = "allwinner,dram";
|
|
clocks = <0x000000de>;
|
|
clock-names = "pll_ddr";
|
|
dram_clk = <0x00000000>;
|
|
dram_type = <0x00000007>;
|
|
dram_zq = <0x003b3bfb>;
|
|
dram_odt_en = <0x00000031>;
|
|
dram_para1 = <0x000030fa>;
|
|
dram_para2 = <0x04000000>;
|
|
dram_mr0 = <0x00001c70>;
|
|
dram_mr1 = <0x00000040>;
|
|
dram_mr2 = <0x00000018>;
|
|
dram_mr3 = <0x00000001>;
|
|
dram_tpr0 = <0x0048a192>;
|
|
dram_tpr1 = <0x01b1a94b>;
|
|
dram_tpr2 = <0x00061043>;
|
|
dram_tpr3 = <0x78787896>;
|
|
dram_tpr4 = <0x00000000>;
|
|
dram_tpr5 = <0x00000000>;
|
|
dram_tpr6 = <0x09090900>;
|
|
dram_tpr7 = <0x4d462a3e>;
|
|
dram_tpr8 = <0x00000000>;
|
|
dram_tpr9 = <0x00000000>;
|
|
dram_tpr10 = <0x00000000>;
|
|
dram_tpr11 = <0x00440000>;
|
|
dram_tpr12 = <0x00000000>;
|
|
dram_tpr13 = <0x00000000>;
|
|
device_type = "dram";
|
|
dram_mr4 = <0x00000000>;
|
|
dram_mr5 = <0x00000400>;
|
|
dram_mr6 = <0x00000848>;
|
|
};
|
|
memory@40000000 {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x40000000 0x00000000 0x20000000>;
|
|
};
|
|
interrupt-controller@03020000 {
|
|
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
|
|
#interrupt-cells = <0x00000003>;
|
|
#address-cells = <0x00000000>;
|
|
device_type = "gic";
|
|
interrupt-controller;
|
|
reg = <0x00000000 0x03021000 0x00000000 0x00001000 0x00000000 0x03022000 0x00000000 0x00002000 0x00000000 0x03024000 0x00000000 0x00002000 0x00000000 0x03026000 0x00000000 0x00002000>;
|
|
interrupts = <0x00000001 0x00000009 0x00000f04>;
|
|
linux,phandle = <0x00000001>;
|
|
phandle = <0x00000001>;
|
|
};
|
|
sunxi-sid@03006000 {
|
|
compatible = "allwinner,sunxi-sid";
|
|
device_type = "sid";
|
|
reg = <0x00000000 0x03006000 0x00000000 0x00001000>;
|
|
};
|
|
sunxi-chipid@03006200 {
|
|
compatible = "allwinner,sunxi-chipid";
|
|
device_type = "chipid";
|
|
reg = <0x00000000 0x03006200 0x00000000 0x00000200>;
|
|
};
|
|
timer_arch {
|
|
compatible = "arm,armv8-timer";
|
|
interrupts = <0x00000001 0x0000000d 0x00000f08 0x00000001 0x0000000e 0x00000f08 0x00000001 0x0000000b 0x00000f08 0x00000001 0x0000000a 0x00000f08>;
|
|
clock-frequency = <0x016e3600>;
|
|
arm,no-tick-in-suspend;
|
|
};
|
|
pmu {
|
|
compatible = "arm,armv8-pmuv3";
|
|
interrupts = <0x00000000 0x0000008c 0x00000004 0x00000000 0x0000008d 0x00000004 0x00000000 0x0000008e 0x00000004 0x00000000 0x0000008f 0x00000004>;
|
|
};
|
|
opp_dvfs_table {
|
|
cluster_num = <0x00000001>;
|
|
opp_table_count = <0x00000003>;
|
|
opp_l_table0 {
|
|
compatible = "allwinner,opp_l_table0";
|
|
opp_count = <0x00000008>;
|
|
opp-shared;
|
|
linux,phandle = <0x000000d8>;
|
|
phandle = <0x000000d8>;
|
|
opp00 {
|
|
opp-hz = <0x00000000 0x1c9c3800>;
|
|
opp-microvolt = <0x000d6d80>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp01 {
|
|
opp-hz = <0x00000000 0x2aea5400>;
|
|
opp-microvolt = <0x000d6d80>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp02 {
|
|
opp-hz = <0x00000000 0x30a32c00>;
|
|
opp-microvolt = <0x000d6d80>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp03 {
|
|
opp-hz = <0x00000000 0x34edce00>;
|
|
opp-microvolt = <0x000d6d80>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp04 {
|
|
opp-hz = <0x00000000 0x405f7e00>;
|
|
opp-microvolt = <0x000e57e0>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000c1c>;
|
|
};
|
|
opp05 {
|
|
opp-hz = <0x00000000 0x4ead9a00>;
|
|
opp-microvolt = <0x000f4240>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000e42>;
|
|
};
|
|
opp06 {
|
|
opp-hz = <0x00000000 0x58b11400>;
|
|
opp-microvolt = <0x00102ca0>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000f6e>;
|
|
};
|
|
};
|
|
opp_l_table1 {
|
|
compatible = "allwinner,opp_l_table1";
|
|
opp_count = <0x00000008>;
|
|
opp-shared;
|
|
linux,phandle = <0x000000d9>;
|
|
phandle = <0x000000d9>;
|
|
opp00 {
|
|
opp-hz = <0x00000000 0x1c9c3800>;
|
|
opp-microvolt = <0x000c8320>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp01 {
|
|
opp-hz = <0x00000000 0x2aea5400>;
|
|
opp-microvolt = <0x000c8320>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp02 {
|
|
opp-hz = <0x00000000 0x30a32c00>;
|
|
opp-microvolt = <0x000c8320>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp03 {
|
|
opp-hz = <0x00000000 0x34edce00>;
|
|
opp-microvolt = <0x000c8320>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp04 {
|
|
opp-hz = <0x00000000 0x405f7e00>;
|
|
opp-microvolt = <0x000d6d80>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000c1c>;
|
|
};
|
|
opp05 {
|
|
opp-hz = <0x00000000 0x4ead9a00>;
|
|
opp-microvolt = <0x000e57e0>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000e42>;
|
|
};
|
|
opp06 {
|
|
opp-hz = <0x00000000 0x58b11400>;
|
|
opp-microvolt = <0x000f4240>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000f6e>;
|
|
};
|
|
};
|
|
opp_l_table2 {
|
|
compatible = "allwinner,opp_l_table2";
|
|
opp_count = <0x00000008>;
|
|
opp-shared;
|
|
linux,phandle = <0x000000da>;
|
|
phandle = <0x000000da>;
|
|
opp00 {
|
|
opp-hz = <0x00000000 0x1c9c3800>;
|
|
opp-microvolt = <0x000c3500>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp01 {
|
|
opp-hz = <0x00000000 0x2aea5400>;
|
|
opp-microvolt = <0x000c3500>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp02 {
|
|
opp-hz = <0x00000000 0x30a32c00>;
|
|
opp-microvolt = <0x000c3500>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp03 {
|
|
opp-hz = <0x00000000 0x34edce00>;
|
|
opp-microvolt = <0x000c3500>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000af0>;
|
|
};
|
|
opp04 {
|
|
opp-hz = <0x00000000 0x405f7e00>;
|
|
opp-microvolt = <0x000cd140>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000c1c>;
|
|
};
|
|
opp05 {
|
|
opp-hz = <0x00000000 0x4ead9a00>;
|
|
opp-microvolt = <0x000dbba0>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000e42>;
|
|
};
|
|
opp06 {
|
|
opp-hz = <0x00000000 0x58b11400>;
|
|
opp-microvolt = <0x000ea600>;
|
|
axi-bus-divide-ratio = <0x00000003>;
|
|
clock-latency-ns = <0x001e8480>;
|
|
pval = <0x00000f6e>;
|
|
};
|
|
};
|
|
};
|
|
dramfreq {
|
|
compatible = "allwinner,sunxi-dramfreq";
|
|
reg = <0x00000000 0x04002000 0x00000000 0x00001000 0x00000000 0x04003000 0x00000000 0x00003000 0x00000000 0x03001000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000021 0x00000004>;
|
|
clocks = <0x000000de>;
|
|
status = "okay";
|
|
};
|
|
uboot {
|
|
};
|
|
iommu@030f0000 {
|
|
compatible = "allwinner,sunxi-iommu";
|
|
reg = <0x00000000 0x030f0000 0x00000000 0x00001000>;
|
|
interrupts = <0x00000000 0x00000039 0x00000004>;
|
|
interrupt-names = "iommu-irq";
|
|
clocks = <0x000000df>;
|
|
clock-names = "iommu";
|
|
#iommu-cells = <0x00000002>;
|
|
status = "okay";
|
|
linux,phandle = <0x00000021>;
|
|
phandle = <0x00000021>;
|
|
};
|
|
gpu@0x01800000 {
|
|
device_type = "gpu";
|
|
compatible = "arm,mali-t720", "arm,mali-midgard";
|
|
reg = <0x00000000 0x01800000 0x00000000 0x00004000>;
|
|
interrupts = <0x00000000 0x00000053 0x00000004 0x00000000 0x00000054 0x00000004 0x00000000 0x00000055 0x00000004>;
|
|
interrupt-names = "GPU", "JOB", "MMU";
|
|
clocks = <0x000000e0 0x000000e1>;
|
|
clock-names = "clk_parent", "clk_mali";
|
|
operating-points = <0x000b8920 0x000fde80 0x00098580 0x000e7ef0 0x0008ca00 0x000e30d0 0x00083d60 0x000de2b0 0x0007b0c0 0x000d9490 0x0006f540 0x000d4670 0x00069780 0x000d1f60 0x000668a0 0x000cf850 0x000639c0 0x000cd140 0x0005dc00 0x000caa30 0x00057e40 0x000c8320 0x00052080 0x000c5c10 0x0004c2c0 0x000c5c10 0x00040740 0x000c5c10 0x00034bc0 0x000c5c10>;
|
|
gpu_idle = <0x00000000>;
|
|
dvfs_status = <0x00000001>;
|
|
temp_ctrl_status = <0x00000001>;
|
|
scene_ctrl_status = <0x00000001>;
|
|
max_normal_level = <0x0000000d>;
|
|
};
|
|
};
|