Vandana Kannan 6fa7aec1db drm/i915: Support for RR switching on VLV ... Definition of VLV RR switch bit and corresponding toggling in set_drrs function. Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-02-24 11:51:37 +01:00
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drm	drm/i915: Support for RR switching on VLV	2015-02-24 11:51:37 +01:00
host1x	gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register	2014-11-13 16:11:57 +01:00
ipu-v3	gpu: ipu-di: Switch to DIV_ROUND_CLOSEST for DI clock divider calc	2015-01-07 19:15:04 +01:00
vga	…
Makefile	…