Tony Luck 46f919c6bd x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN ... commit e464121f2d40eabc7d11823fb26db807ce945df4 upstream. Missed adding the Icelake-D CPU to the list. It uses the same MSRs to control and read the inventory number as all the other models. Fixes: dc6b025de9 ("x86/mce: Add Xeon Icelake to list of CPUs that support PPIN") Reported-by: Ailin Xu <ailin.xu@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20220121174743.1875294-2-tony.luck@intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2022-02-05 12:37:55 +01:00
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Makefile	…
amd.c	x86/MCE/AMD: Allow thresholding interface updates after init	2022-02-01 17:25:42 +01:00
apei.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333	2019-06-05 17:37:06 +02:00
core.c	x86/mce: Mark mce_read_aux() noinstr	2022-01-27 10:54:16 +01:00
dev-mcelog.c	x86/mce/dev-mcelog: Do not update kflags on AMD systems	2020-09-15 10:04:51 +02:00
genpool.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 437	2019-06-05 17:37:17 +02:00
inject.c	x86/mce/inject: Avoid out-of-bounds write when setting flags	2022-01-27 10:54:00 +01:00
intel.c	x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN	2022-02-05 12:37:55 +01:00
internal.h	x86/mce: Pass pointer to saved pt_regs to severity calculation routines	2020-10-07 10:51:42 +02:00
p5.c	x86/mce: Address objtools noinstr complaints	2020-06-11 15:15:02 +02:00
severity.c	x86/mce: Decode a kernel instruction to determine if it is copying from user	2020-10-07 11:32:40 +02:00
therm_throt.c	x86/entry: Convert various system vectors	2020-06-11 15:15:14 +02:00
threshold.c	x86/entry: Convert various system vectors	2020-06-11 15:15:14 +02:00
winchip.c	x86/mce: Address objtools noinstr complaints	2020-06-11 15:15:02 +02:00