Rob Clark 5f78ad9383 drm/msm: Fix range size vs end confusion ... [ Upstream commit 537fef808be5ea56f6fc06932162550819a3b3c3 ] The fourth param is size, rather than range_end. Note that we could increase the address space size if we had a way to prevent buffers from spanning a 4G split, mostly just to avoid fw bugs with 64b math. Fixes: 84c31ee16f ("drm/msm/a6xx: Add support for per-instance pagetables") Signed-off-by: Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20220407202836.1211268-1-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-04-20 09:23:14 +02:00
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a2xx.xml.h	…
a2xx_gpu.c	…
a2xx_gpu.h	…
a3xx.xml.h	…
a3xx_gpu.c	…
a3xx_gpu.h	…
a4xx.xml.h	…
a4xx_gpu.c	…
a4xx_gpu.h	…
a5xx.xml.h	…
a5xx_debugfs.c	…
a5xx_gpu.c	…
a5xx_gpu.h	…
a5xx_power.c	…
a5xx_preempt.c	…
a6xx.xml.h	…
a6xx_gmu.c	…
a6xx_gmu.h	…
a6xx_gmu.xml.h	…
a6xx_gpu.c	drm/msm: Fix range size vs end confusion	2022-04-20 09:23:14 +02:00
a6xx_gpu.h	drm/msm/a6xx: Track current ctx by seqno	2021-10-20 11:45:05 +02:00
a6xx_gpu_state.c	drm/msm/a6xx: Allocate enough space for GMU registers	2021-12-08 09:03:26 +01:00
a6xx_gpu_state.h	…
a6xx_hfi.c	…
a6xx_hfi.h	…
adreno_common.xml.h	…
adreno_device.c	…
adreno_gpu.c	…
adreno_gpu.h	…
adreno_pm4.xml.h	…