Sagar Shrikant Kadam 83cba933a6 mtd: spi-nor: Set default Quad Enable method for ISSI flashes ... Set the default Quad Enable method for ISSI flashes. Used for ISSI flashes (IS25WP256D-JMLE) that do not support SFDP tables and can not determine the Quad Enable method by parsing BFPT. Based on code originally written by Wesley Terpstra <wesley@sifive.com> and/or Palmer Dabbelt <palmer@sifive.com> c94e267766 Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> [tudor.ambarus@microchip.com: - rebase, split and adapt for latest spi-nor/next, - use PMC CFI ID for ISSI. According to JEP106BA, "Programmable Micro Corp" changed its name to Integrated Silicon Solution (ISSI)] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>		2019-11-11 20:42:55 +02:00
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bbm.h	…
blktrans.h	…
cfi.h	NAND core changes:	2019-07-06 22:51:56 +02:00
cfi_endian.h	…
concat.h	…
doc2000.h	…
flashchip.h	…
ftl.h	…
gen_probe.h	…
hyperbus.h	…
inftl.h	…
jedec.h	…
latch-addr-flash.h	…
lpc32xx_mlc.h	…
lpc32xx_slc.h	…
map.h	…
mtd.h	mtd: mtdcore: add debugfs nodes for querying the flash name and id	2019-08-29 10:36:47 +03:00
mtdram.h	…
nand-gpio.h	…
nand.h	mtd: nand: fix typo, s/erasablocks/eraseblocks	2019-08-26 09:25:41 +02:00
nand_bch.h	…
nand_ecc.h	…
ndfc.h	…
nftl.h	…
onenand.h	…
onenand_regs.h	This pull-request contains the following changes for MTD:	2019-07-13 15:42:44 -07:00
onfi.h	…
partitions.h	…
pfow.h	…
physmap.h	…
pismo.h	…
plat-ram.h	…
platnand.h	…
qinfo.h	…
rawnand.h	This pull-request contains the following changes for MTD:	2019-07-13 15:42:44 -07:00
sh_flctl.h	…
sharpsl.h	mtd: rawnand: sharpsl: add include guard to linux/mtd/sharpsl.h	2019-08-26 09:25:41 +02:00
spear_smi.h	…
spi-nor.h	mtd: spi-nor: Set default Quad Enable method for ISSI flashes	2019-11-11 20:42:55 +02:00
spinand.h	mtd: spinand: Add initial support for Paragon PN26G0xA	2019-06-27 20:13:07 +02:00
super.h	mtd: Kill mount_mtd()	2019-09-05 14:34:26 -04:00
ubi.h	…
xip.h	…