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QQT912/CW32F030/原项目程序/SW/Libraries/inc/cw32f030_atim.h

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Initial: CW32F030 reference + CW32L012 BLDC port Add working CW32F030 BLDC Hall PID reference firmware and port the application to CW32L012 with Keil MDK project QQT912_L012. Co-authored-by: Cursor <cursoragent@cursor.com>
2026-07-05 04:31:26 +08:00
/*******************************************************************************
*
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*
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __CW32F030_ATIM_H
#define __CW32F030_ATIM_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "cw32f030.h"
/******************************************************************************
* type definitions ('typedef')
******************************************************************************/
typedef struct
{
uint32_t CounterDirection; /*!< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
uint32_t CounterOPMode; /*!< <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ظ<EFBFBD> */
uint32_t CounterAlignedMode; /*!< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ: <20><><EFBFBD>ػ<EFBFBD><D8BB><EFBFBD><EFBFBD><EFBFBD> */
FunctionalState BufferState; /*!< ARR<52><52><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> */
uint32_t Prescaler; /*!< Ԥ<><D4A4>Ƶϵ<C6B5><CFB5> */
uint32_t ClockSelect; /*!< <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ѡ<EFBFBD><D1A1> */
uint32_t ReloadValue; /*!< ARR<52><52>ֵ<EFBFBD><D6B5>ȡֵ<C8A1><D6B5>Χ0x0000~0xFFFF */
uint32_t RepetitionCounter; /*!< <20>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD>ֵ<EFBFBD><D6B5>RCR<43>Ĵ<EFBFBD><C4B4><EFBFBD> */
FunctionalState UnderFlowMask; /*!< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> */
FunctionalState OverFlowMask; /*!< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> */
} ATIM_InitTypeDef;
typedef struct
{
uint32_t ICPolarity; /*!< <20><><EFBFBD>벶<EFBFBD><EBB2B6><EFBFBD><EFBFBD><EFBFBD>ԣ<EFBFBD><D4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>½<EFBFBD><C2BD><EFBFBD>˫<EFBFBD><CBAB> */
uint32_t ICFilter; /*!< <20><><EFBFBD><EFBFBD><EFBFBD>˲<EFBFBD><CBB2><EFBFBD><EFBFBD><EFBFBD> */
} ATIM_ICInitTypeDef;
typedef struct
{
uint32_t OCPolarity; /*!< <20>˿ڼ<CBBF><DABC><EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򡢷<EFBFBD><F2A1A2B7><EFBFBD> */
uint32_t OCMode; /*!< <20>Ƚ<EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD> */
uint32_t OCInterruptSelect; /*!< <20>Ƚ<EFBFBD><C8BD>ж<EFBFBD>ģʽ */
FunctionalState OCDMAState; /*!< <20>Ƚ<EFBFBD>ƥ<EFBFBD>䴥<EFBFBD><E4B4A5>DMAʹ<41><CAB9>״̬ */
FunctionalState OCInterruptState; /*!< <20>Ƚ<EFBFBD>ƥ<EFBFBD>䴥<EFBFBD><E4B4A5><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><CAB9>״̬ */
FunctionalState BufferState; /*!< <20>Ƚϻ<C8BD><CFBB><EFBFBD>ʹ<EFBFBD><CAB9>״̬ */
} ATIM_OCInitTypeDef;
/******************************************************************************
* pre-processor symbols/macros ('#define')
******************************************************************************/
#define ATIM_COUNTING_UP (0UL)
#define ATIM_COUNTING_DOWN (1UL << 27)
#define IS_ATIM_COUNTING_DIRECTION(DIR) (((DIR) == ATIM_COUNTING_UP) || \
((DIR) == ATIM_COUNTING_DOWN))
#define ATIM_OP_MODE_SINGLE (1UL << 14)
#define ATIM_OP_MODE_REPETITIVE (0UL)
#define IS_ATIM_OP_MODE(MODE) (((MODE) == ATIM_OP_MODE_SINGLE) || \
((MODE) == ATIM_OP_MODE_REPETITIVE))
#define ATIM_COUNT_MODE_EDGE_ALIGN (2UL << 12)
#define ATIM_COUNT_MODE_CENTER_ALIGN (3UL << 12)
#define IS_ATIM_COUNT_MODE(MODE) (((MODE) == ATIM_COUNT_MODE_EDGE_ALIGN) || \
((MODE) == ATIM_COUNT_MODE_CENTER_ALIGN))
#define ATIM_CR_IT_UNDE (1UL << 29)
#define ATIM_CR_IT_OVE (1UL << 28)
#define ATIM_CR_IT_BIE (1UL << 20)
#define ATIM_CR_IT_TIE (1UL << 19)
#define ATIM_CR_IT_UIE (1UL << 10)
#define ATIM_BUFFER_ENABLE (1UL << 7)
#define ATIM_BUFFER_DISABLE (0UL)
#define ATIM_Prescaler_DIV1 (0UL)
#define ATIM_Prescaler_DIV2 (1UL << 4)
#define ATIM_Prescaler_DIV4 (2UL << 4)
#define ATIM_Prescaler_DIV8 (3UL << 4)
#define ATIM_Prescaler_DIV16 (4UL << 4)
#define ATIM_Prescaler_DIV32 (5UL << 4)
#define ATIM_Prescaler_DIV64 (6UL << 4)
#define ATIM_Prescaler_DIV256 (7UL << 4)
#define IS_ATIM_PRESCALER(PRESCALER) (((PRESCALER) == ATIM_Prescaler_DIV1) ||\
((PRESCALER) == ATIM_Prescaler_DIV2) ||\
((PRESCALER) == ATIM_Prescaler_DIV4) ||\
((PRESCALER) == ATIM_Prescaler_DIV8) ||\
((PRESCALER) == ATIM_Prescaler_DIV16) ||\
((PRESCALER) == ATIM_Prescaler_DIV64) ||\
((PRESCALER) == ATIM_Prescaler_DIV256))
#define ATIM_CLOCK_PCLK (0UL)
#define ATIM_CLOCK_ETR (1UL << 2)
#define IS_ATIM_CLOCK(CLK) (((CLK) == ATIM_CLOCK_PCLK) || \
((CLK) == ATIM_CLOCK_ETR))
#define ATIM_IT_UIF (1UL)
#define ATIM_IT_C1AF (1UL << 2)
#define ATIM_IT_C2AF (1UL << 3)
#define ATIM_IT_C3AF (1UL << 4)
#define ATIM_IT_C1BF (1UL << 5)
#define ATIM_IT_C2BF (1UL << 6)
#define ATIM_IT_C3BF (1UL << 7)
#define ATIM_IT_C1AE (1UL << 8)
#define ATIM_IT_C2AE (1UL << 9)
#define ATIM_IT_C3AE (1UL << 10)
#define ATIM_IT_C1BE (1UL << 11)
#define ATIM_IT_C2BE (1UL << 12)
#define ATIM_IT_C3BE (1UL << 13)
#define ATIM_IT_BIF (1UL << 14)
#define ATIM_IT_TIF (1UL << 15)
#define ATIM_IT_OVF (1UL << 16)
#define ATIM_IT_UNDF (1UL << 17)
#define ATIM_IT_C4AF (1UL << 18)
#define ATIM_CH_A_IC (1UL << 4)
#define ATIM_CH_A_OC (0UL)
#define ATIM_CH_B_IC (1UL << 5)
#define ATIM_CH_B_OC (0UL)
#define ATIM_CHxA_BUFF (1UL << 6)
#define ATIM_CHxA_CIE (1UL << 8)
#define ATIM_CHxA_CDE (1UL << 10)
#define ATIM_CHxB_BUFF (1UL << 7)
#define ATIM_CHxB_CIE (1UL << 9)
#define ATIM_CHxB_CDE (1UL << 11)
#define ATIM_CH4_BUFF (1UL)
#define ATIM_CH4_CIE (1UL << 1)
#define ATIM_CH4_CDE (1UL << 2)
#define ATIM_ICPOLOARITY_DISABLE (0UL)
#define ATIM_ICPOLARITY_RISING (1UL)
#define ATIM_ICPOLARITY_FALLING (2UL)
#define ATIM_ICPOLARITY_BOTHEDGE (3UL)
#define IS_ATIM_IC_POLARITY(POLARITY) (((POLARITY) == ATIM_ICPOLOARITY_DISABLE) || \
((POLARITY) == ATIM_ICPOLARITY_RISING) || \
((POLARITY) == ATIM_ICPOLARITY_FALLING)|| \
((POLARITY) == ATIM_ICPOLARITY_BOTHEDGE))
#define ATIM_ICFILTER_NONE (0UL)
#define ATIM_ICFILTER_PCLK_N3 (4UL)
#define ATIM_ICFILTER_PCLKDIV4_N3 (5UL)
#define ATIM_ICFILTER_PCLKDIV16_N3 (6UL)
#define ATIM_ICFILTER_PCLKDIV64_N3 (7UL)
#define IS_ATIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 7UL)
#define ATIM_OCPOLARITY_NONINVERT (0UL)
#define ATIM_OCPOLARITY_INVERT (1UL)
#define IS_ATIM_OC_POLARITY(POLARITY) (((POLARITY) == ATIM_OCPOLARITY_NONINVERT) || \
((POLARITY) == ATIM_OCPOLARITY_INVERT))
#define ATIM_OCMODE_FORCED_INACTIVE (0UL)
#define ATIM_OCMODE_FORCED_ACTIVE (1UL)
#define ATIM_OCMODE_INACTIVE (2UL)
#define ATIM_OCMODE_ACTIVE (3UL)
#define ATIM_OCMODE_TOGGLE (4UL)
#define ATIM_OCMODE_ONE_PLUSE (5UL)
#define ATIM_OCMODE_PWM1 (6UL)
#define ATIM_OCMODE_PWM2 (7UL)
#define IS_ATIM_OC_MODE(MODE) ((MODE) <= 7UL)
#define ATIM_OC_IT_NONE (0UL)
#define ATIM_OC_IT_UP_COUNTER (1UL)
#define ATIM_OC_IT_DOWN_COUNTER (2UL)
#define ATIM_OC_IT_BOTH_COUNTER (3UL)
#define IS_ATIM_OC_IT(SELECT) ((SELECT) <= 3UL)
#define ATIM_ETR_POLARITY_NONINVERT (0UL)
#define ATIM_ETR_POLARITY_INVERT (1UL << 31)
#define IS_ATIM_ETR_POLARITY(POLARITY) (((POLARITY) == ATIM_ETR_POLARITY_INVERT) || \
((POLARITY) == ATIM_ETR_POLARITY_NONINVERT))
#define ATIM_ETR_FILTER_NONE (0UL)
#define ATIM_ETR_FILTER_PCLK_N3 (4UL << 28)
#define ATIM_ETR_FILTER_PCLKDIV4_N3 (5UL << 28)
#define ATIM_ETR_FILTER_PCLKDIV16_N3 (6UL << 28)
#define ATIM_ETR_FILTER_PCLKDIV64_N3 (7UL << 28)
#define IS_ATIM_ETR_FILTER(FILTER) (((FILTER) == ATIM_ETR_FILTER_NONE) ||\
((FILTER) == ATIM_ETR_FILTER_PCLK_N3) || \
((FILTER) == ATIM_ETR_FILTER_PCLKDIV4_N3) || \
((FILTER) == ATIM_ETR_FILTER_PCLKDIV16_N3) || \
((FILTER) == ATIM_ETR_FILTER_PCLKDIV64_N3))
#define ATIM_BRAKE_POLARITY_NONINVERT (0UL)
#define ATIM_BRAKE_POLARITY_INVERT (1UL << 27)
#define IS_ATIM_BRAKE_POLARITY(POLARITY) (((POLARITY) == ATIM_BRAKE_POLARITY_INVERT) || \
((POLARITY) == ATIM_BRAKE_POLARITY_NONINVERT))
#define ATIM_BRAKE_FILTER_NONE (0UL)
#define ATIM_BRAKE_FILTER_PCLK_N3 (4UL << 24)
#define ATIM_BRAKE_FILTER_PCLKDIV4_N3 (5UL << 24)
#define ATIM_BRAKE_FILTER_PCLKDIV16_N3 (6UL << 24)
#define ATIM_BRAKE_FILTER_PCLKDIV64_N3 (7UL << 24)
#define IS_ATIM_BRAKE_FILTER(FILTER) (((FILTER) == ATIM_BRAKE_FILTER_NONE) ||\
((FILTER) == ATIM_BRAKE_FILTER_PCLK_N3) || \
((FILTER) == ATIM_BRAKE_FILTER_PCLKDIV4_N3) || \
((FILTER) == ATIM_BRAKE_FILTER_PCLKDIV16_N3) || \
((FILTER) == ATIM_BRAKE_FILTER_PCLKDIV64_N3))
#define ATIM_ADC_TRIGGER_GLOBAL (1UL << 7)
#define ATIM_ADC_TRIGGER_CH3B (1UL << 6)
#define ATIM_ADC_TRIGGER_CH2B (1UL << 5)
#define ATIM_ADC_TRIGGER_CH1B (1UL << 4)
#define ATIM_ADC_TRIGGER_CH3A (1UL << 3)
#define ATIM_ADC_TRIGGER_CH2A (1UL << 2)
#define ATIM_ADC_TRIGGER_CH1A (1UL << 1)
#define ATIM_ADC_TRIGGER_UPDATA_EVENT (1UL)
#define IS_ATIM_ADC_TRIGGER(SOURCE) ((SOURCE) <= 0x000000FF)
#define OCREFA_TYPE_DOUBLE (0UL)
#define OCREFA_TYPE_SINGLE (1UL << 3)
#define IS_ATIM_OCREFA_TYPE(TYPE) ((TYPE) == OCREFA_TYPE_DOUBLE || (TYPE) == OCREFA_TYPE_SINGLE)
#define OUTPUT_TYPE_ALONE (0UL)
#define OUTPUT_TYPE_COMP (1UL << 1)
#define IS_ATIM_OUTPUT_TYPE(TYPE) ((TYPE) == OUTPUT_TYPE_ALONE || (TYPE) == OUTPUT_TYPE_COMP)
#define IS_ATIM_DEADTIME(VAL) ((VAL)<= 0xFF)
#define ATIM_MASTER_OUTPUT_UG 0x00 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>UG
#define ATIM_MASTER_OUTPUT_CTEN 0x01 // <20><>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9>CTEN
#define ATIM_MASTER_OUTPUT_UEV 0x02 // <20><>ʱ<EFBFBD><CAB1>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>UEV
#define ATIM_MASTER_OUTPUT_CMPSO 0x03 // <20>Ƚ<EFBFBD>ƥ<EFBFBD><C6A5>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CMPSO
#define ATIM_MASTER_OUTPUT_OCREF1A 0x04 // <20><>ʱ<EFBFBD><CAB1><EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD><EFBFBD><EFBFBD>OCREF1A
#define ATIM_MASTER_OUTPUT_OCREF2A 0x05 // <20><>ʱ<EFBFBD><CAB1><EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD><EFBFBD><EFBFBD>OCREF2A
#define ATIM_MASTER_OUTPUT_OCREF3A 0x06 // <20><>ʱ<EFBFBD><CAB1><EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD><EFBFBD><EFBFBD>OCREF3A
#define ATIM_MASTER_OUTPUT_OCREF1B 0x07 // <20><>ʱ<EFBFBD><CAB1><EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD><EFBFBD><EFBFBD>OCREF1B
#define IS_ATIM_MASTER_OUTPUT(OUTPUT) ((OUTPUT) <= 0x07)
#define ATIM_SLAVER_TYPE_PCLK 0x00 // <20>ڲ<EFBFBD>ʱ<EFBFBD><CAB1>
#define ATIM_SLAVER_TYPE_RESET 0x01 // <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
#define ATIM_SLAVER_TYPE_TRIGGER 0x02 // <20><><EFBFBD><EFBFBD>ģʽ
#define ATIM_SLAVER_TYPE_EXT 0x03 // <20>ⲿʱ<E2B2BF><CAB1>
#define ATIM_SLAVER_TYPE_ENCODE1 0x04 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ1
#define ATIM_SLAVER_TYPE_ENCODE2 0x05 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ2
#define ATIM_SLAVER_TYPE_ENCODE3 0x06 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ3
#define ATIM_SLAVER_TYPE_GATE 0x07 // <20>ſع<C5BF><D8B9><EFBFBD>
#define IS_ATIM_SLAVER_TYPE(TYPE) ((TYPE) <= 0x07)
#define ATIM_TRIGGER_SOURCE_ETFP 0x00 // <20>˿<EFBFBD>ETR<54><52><EFBFBD>˲<EFBFBD><CBB2><EFBFBD>λѡ<CEBB><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ETFP
#define ATIM_TRIGGER_SOURCE_ITR 0x01 // <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ITR
#define ATIM_TRIGGER_SOURCE_CH1A 0x05 // <20>˿<EFBFBD>CH1A<31>ı<EFBFBD><C4B1><EFBFBD><EFBFBD>ź<EFBFBD>
#define ATIM_TRIGGER_SOURCE_IAFP 0x06 // <20>˿<EFBFBD>CH1A<31><41><EFBFBD>˲<EFBFBD><CBB2><EFBFBD>λѡ<CEBB><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>IAFP
#define ATIM_TRIGGER_SOURCE_IBFP 0x07 // <20>˿<EFBFBD>CH1B<31><42><EFBFBD>˲<EFBFBD><CBB2><EFBFBD>λѡ<CEBB><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>IBFP
#define IS_ATIM_TRIGGER_SOURCE(SRC) ((SRC) == ATIM_TRIGGER_SOURCE_ETFP || \
(SRC) == ATIM_TRIGGER_SOURCE_ITR || \
(SRC) == ATIM_TRIGGER_SOURCE_CH1A || \
(SRC) == ATIM_TRIGGER_SOURCE_IAFP || \
(SRC) == ATIM_TRIGGER_SOURCE_IBFP)
#define ATIM_UPDATE_EVENT_NORMAL 0x01 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define ATIM_UPDATE_EVENT_EXTENSION 0x00 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><>ģʽ<C4A3><CABD>λ
#define IS_ATIM_UPDATE_EVENT(EVENT) ((EVENT) == ATIM_UPDATE_EVENT_NORMAL || \
(EVENT) == ATIM_UPDATE_EVENT_EXTENSION)
/******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes
******************************************************************************/
void ATIM_DeInit(void);
void ATIM_Init(ATIM_InitTypeDef *ATIM_InitStruct);
void ATIM_Cmd(FunctionalState NewState);
void ATIM_ITConfig(uint32_t ATIM_IT, FunctionalState NewState);
ITStatus ATIM_GetITStatus(uint32_t ATIM_IT);
void ATIM_ClearITPendingBit(uint32_t ATIM_IT);
void ATIM_SetReloadValue(uint32_t Value);
void ATIM_CH1Config(uint32_t Function, FunctionalState NewState);
void ATIM_CH2Config(uint32_t Function, FunctionalState NewState);
void ATIM_CH3Config(uint32_t Function, FunctionalState NewState);
void ATIM_CH4Config(uint32_t Function, FunctionalState NewState);
void ATIM_IC1AInit(ATIM_ICInitTypeDef *TIM_ICInitStruct);
void ATIM_IC1BInit(ATIM_ICInitTypeDef *TIM_ICInitStruct);
void ATIM_IC2AInit(ATIM_ICInitTypeDef *TIM_ICInitStruct);
void ATIM_IC2BInit(ATIM_ICInitTypeDef *TIM_ICInitStruct);
void ATIM_IC3AInit(ATIM_ICInitTypeDef *TIM_ICInitStruct);
void ATIM_IC3BInit(ATIM_ICInitTypeDef *TIM_ICInitStruct);
void ATIM_OC1AInit(ATIM_OCInitTypeDef *ATIM_OCInitStruct);
void ATIM_OC2AInit(ATIM_OCInitTypeDef *ATIM_OCInitStruct);
void ATIM_OC3AInit(ATIM_OCInitTypeDef *ATIM_OCInitStruct);
void ATIM_OC1BInit(ATIM_OCInitTypeDef *ATIM_OCInitStruct);
void ATIM_OC2BInit(ATIM_OCInitTypeDef *ATIM_OCInitStruct);
void ATIM_OC3BInit(ATIM_OCInitTypeDef *ATIM_OCInitStruct);
void ATIM_OC4Init(FunctionalState NewState, uint32_t ITSelect, FunctionalState DMAState,
FunctionalState ITState, FunctionalState BufferState);
void ATIM_PWMOutputConfig(uint32_t OCREFAType, uint32_t OutputType, int16_t Deadtime);
void ATIM_CtrlPWMOutputs(FunctionalState NewState);
void ATIM_ETRConfig(uint32_t ATIM_ETRPolarity, uint32_t ATIM_ETRFilter);
void ATIM_BrakeConfig(uint32_t ATIM_BrakePolarity, uint32_t ATIM_BrakeFilter);
void ATIM_ADCTriggerConfig(uint32_t ATIM_ADCTriggerSource, FunctionalState NewState);
uint16_t ATIM_GetCapture1A(void);
uint16_t ATIM_GetCapture2A(void);
uint16_t ATIM_GetCapture3A(void);
uint16_t ATIM_GetCapture1B(void);
uint16_t ATIM_GetCapture2B(void);
uint16_t ATIM_GetCapture3B(void);
uint16_t ATIM_GetCapture4(void);
void ATIM_SetCompare1A(uint16_t Compare);
void ATIM_SetCompare2A(uint16_t Compare);
void ATIM_SetCompare3A(uint16_t Compare);
void ATIM_SetCompare1B(uint16_t Compare);
void ATIM_SetCompare2B(uint16_t Compare);
void ATIM_SetCompare3B(uint16_t Compare);
void ATIM_SetCompare4(uint16_t Compare);
void ATIM_MasterModeConfig(uint8_t ATIM_MasterOutput);
void ATIM_SlaverModeConfig(uint8_t ATIM_SlaverType);
void ATIM_TriggerSelect(uint8_t ATIM_TriggerSource);
void ATIM_UpdateEventSelect(uint8_t ATIM_UpdateEvent);
#ifdef __cplusplus
}
#endif
#endif /*__CW32F030_ATIM_H */
/**
* @}
*/