QQT912/原单片机-CW32F030/原项目程序/SW/12 CW32 BLDC haLL pid OK/USER/init.c

252 lines
9.2 KiB
C
Raw Normal View History

#include "globalv.h"
#include "init.h"
uint8_t ADC_CR1Array[4] = {0x84, 0x85, 0x86, 0x87}; // ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC<44><43>CR1<52>Ĵ<EFBFBD><C4B4><EFBFBD>ʵ<EFBFBD><CAB5>ADCͨ<43><CDA8><EFBFBD>Զ<EFBFBD><D4B6>л<EFBFBD>
uint8_t ADC_Start = 0x01;
//void RCC_Configuration(void)
//{//48M,
//
// //.......................... 48M
// RCC_HSI_Enable(RCC_HSIOSC_DIV6);
// __RCC_FLASH_CLK_ENABLE();
// FLASH_SetLatency(FLASH_Latency_3);
// RCC_HSI_Enable(RCC_HSIOSC_DIV1);
// //.............................
//}
void RCC_Configuration(void)
{
//...........................64M
// 0. HSIʹ<49>ܲ<EFBFBD>У׼
RCC_HSI_Enable(RCC_HSIOSC_DIV6);
// 1. <20><><EFBFBD><EFBFBD>HCLK<4C><4B>PCLK<4C>ķ<EFBFBD>Ƶϵ<C6B5><CFB5><EFBFBD><EFBFBD>
RCC_HCLKPRS_Config(RCC_HCLK_DIV1);
RCC_PCLKPRS_Config(RCC_PCLK_DIV1);
// 2. ʹ<><CAB9>PLL<4C><4C>ͨ<EFBFBD><CDA8>PLL<4C><4C>Ƶ<EFBFBD><C6B5>64MHz
RCC_PLL_Enable(RCC_PLLSOURCE_HSI, 8000000, 8); // HSI Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5>8MHz
///< <20><>ʹ<EFBFBD>õ<EFBFBD>ʱ<EFBFBD><CAB1>ԴHCLK<4C><4B><EFBFBD><EFBFBD>24M,С<>ڵ<EFBFBD><DAB5><EFBFBD>48MHz<48><7A><EFBFBD><EFBFBD><EFBFBD><EFBFBD>FLASH <20><><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>Ϊ2 cycle
///< <20><>ʹ<EFBFBD>õ<EFBFBD>ʱ<EFBFBD><CAB1>ԴHCLK<4C><4B><EFBFBD><EFBFBD>48MHz<48><7A><EFBFBD><EFBFBD><EFBFBD><EFBFBD>FLASH <20><><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>Ϊ3 cycle
__RCC_FLASH_CLK_ENABLE();
FLASH_SetLatency(FLASH_Latency_3);
// 3. ʱ<><CAB1><EFBFBD>л<EFBFBD><D0BB><EFBFBD>PLL
RCC_SysClk_Switch(RCC_SYSCLKSRC_PLL);
RCC_SystemCoreClockUpdate(64000000);
//..............................
}
void GPIOInit(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
__RCC_GPIOA_CLK_ENABLE();
__RCC_GPIOB_CLK_ENABLE();
__RCC_GPIOC_CLK_ENABLE();
__RCC_GPIOF_CLK_ENABLE();
GPIO_InitStruct.IT = GPIO_IT_NONE; //LED1
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Pins = LED_GPIO_PIN;
GPIO_Init(LED_GPIO_PORT, &GPIO_InitStruct);
// GPIO_InitStruct.Pins = LEDDIR_GPIO_PIN;
// GPIO_Init(LEDDIR_GPIO_PORT, &GPIO_InitStruct);
// GPIO_InitStruct.Pins = LEDSTSTO_GPIO_PIN;
// GPIO_Init(LEDSTSTO_GPIO_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pins = VOUT_EN_GPIO_PIN;
GPIO_Init(VOUT_EN_GPIO_PORT, &GPIO_InitStruct);
// GPIO_WritePin(LEDDIR_GPIO_PORT,LEDDIR_GPIO_PIN,GPIO_Pin_RESET); //<2F><><EFBFBD><EFBFBD>ָʾ<D6B8><CABE><EFBFBD><EFBFBD>
// GPIO_WritePin(LEDSTSTO_GPIO_PORT,LEDSTSTO_GPIO_PIN,GPIO_Pin_SET); //<2F><>ָͣʾ<D6B8><CABE><EFBFBD><EFBFBD>
GPIO_WritePin(VOUT_EN_GPIO_PORT,VOUT_EN_GPIO_PIN,GPIO_Pin_RESET); //<2F><>ָͣʾ<D6B8><CABE><EFBFBD><EFBFBD>
GPIO_InitStruct.IT = GPIO_IT_NONE;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Pins = EN_GPIO_PIN;
GPIO_Init(EN_GPIO_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pins = DR_GPIO_PIN;
GPIO_Init(DR_GPIO_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pins = BKIN_GPIO_PIN;
GPIO_Init(BKIN_GPIO_PORT, &GPIO_InitStruct);
}
void ADC_Configuration(void)
{
ADC_InitTypeDef ADC_InitStruct;
DMA_InitTypeDef DMA_InitStruct = {0};
__RCC_GPIOA_CLK_ENABLE();
__RCC_GPIOB_CLK_ENABLE();
__RCC_ADC_CLK_ENABLE();
//<2F><><EFBFBD><EFBFBD>ADC<44><43><EFBFBD><EFBFBD>IO<49><4F>
PA04_ANALOG_ENABLE() ; //ĸ<>ߵ<EFBFBD>ѹ
PA05_ANALOG_ENABLE() ; //NTC<54><EFBFBD>
PA06_ANALOG_ENABLE() ; //<2F><><EFBFBD><EFBFBD>
PA07_ANALOG_ENABLE() ; //<2F><>λ<EFBFBD><CEBB>
ADC_InitStruct.ADC_AccEn = ADC_AccDisable;
ADC_InitStruct.ADC_Align = ADC_AlignRight;
ADC_InitStruct.ADC_ClkDiv = ADC_Clk_Div2; // ADCCLK=16MHz
ADC_InitStruct.ADC_DMAEn = ADC_DmaEnable;
ADC_InitStruct.ADC_InBufEn = ADC_BufDisable;
ADC_InitStruct.ADC_OpMode = ADC_SingleChOneMode;
ADC_InitStruct.ADC_SampleTime = ADC_SampTime10Clk;
ADC_InitStruct.ADC_TsEn = ADC_TsDisable;
ADC_InitStruct.ADC_VrefSel = ADC_Vref_VDDA;
ADC_Init(&ADC_InitStruct);
CW_ADC->CR1_f.CHMUX = 3; // AN0
ADC_Enable();
// ʹ<><CAB9>4·DMAͨ<41><CDA8><EFBFBD><EFBFBD>CH1<48><31>CH2<48><32>CH3<48><33> CH4
// CH1 <20><>ADC<44><43><EFBFBD>ε<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RAM<41><4D>ADC_ResultBuff[6]<5D><>
// CH2 <20><>ADC<44><43>CR1<52>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>RAM<41><4D>ADC_CR1Array<61><79><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
// CH3 <20><>ADC<44><43>START<52>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>RAM<41><4D>ADC_Start)<29><><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
// CH1<48><31>CH2<48><32>CH3<48><33>ADCӲ<43><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// CH4<48><34>ATIMӲ<4D><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>ADC
__RCC_DMA_CLK_ENABLE();
DMA_InitStruct.DMA_DstAddress = (uint32_t)&SampleData[0]; // Ŀ<><C4BF><EFBFBD><EFBFBD>ַ
DMA_InitStruct.DMA_DstInc = DMA_DstAddress_Increase; // Ŀ<><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
DMA_InitStruct.DMA_Mode = DMA_MODE_BLOCK; // BLOCK<43><4B><EFBFBD><EFBFBD>ģʽ
DMA_InitStruct.DMA_SrcAddress = (uint32_t)&CW_ADC->RESULT0; // Դ<><D4B4>ַ<EFBFBD><D6B7> ADC<44>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
DMA_InitStruct.DMA_SrcInc = DMA_SrcAddress_Fix; // Դ<><D4B4>ַ<EFBFBD>̶<EFBFBD>
DMA_InitStruct.DMA_TransferCnt = 0x4; // DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_InitStruct.DMA_TransferWidth = DMA_TRANSFER_WIDTH_16BIT; // <20><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>16bit
DMA_InitStruct.HardTrigSource = DMA_HardTrig_ADC_TRANSCOMPLETE; // ADCת<43><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>
DMA_InitStruct.TrigMode = DMA_HardTrig; // Ӳ<><D3B2><EFBFBD><EFBFBD>ģʽ
DMA_Init(CW_DMACHANNEL1, &DMA_InitStruct);
DMA_Cmd(CW_DMACHANNEL1, ENABLE);
DMA_InitStruct.DMA_DstAddress = (uint32_t)&CW_ADC->CR1; // Ŀ<><C4BF><EFBFBD><EFBFBD>ַ
DMA_InitStruct.DMA_DstInc = DMA_DstAddress_Fix; // Ŀ<><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD>̶<EFBFBD>
DMA_InitStruct.DMA_Mode = DMA_MODE_BLOCK; // BLOCK<43><4B><EFBFBD><EFBFBD>ģʽ
DMA_InitStruct.DMA_SrcAddress = (uint32_t)&ADC_CR1Array[0]; // Դ<><D4B4>ַ
DMA_InitStruct.DMA_SrcInc = DMA_SrcAddress_Increase; // Դ<><D4B4>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
DMA_InitStruct.DMA_TransferCnt = 0x3; // DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_InitStruct.DMA_TransferWidth = DMA_TRANSFER_WIDTH_8BIT; // <20><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>8bit
DMA_InitStruct.HardTrigSource = DMA_HardTrig_ADC_TRANSCOMPLETE; // ADCת<43><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>
DMA_InitStruct.TrigMode = DMA_HardTrig; // Ӳ<><D3B2><EFBFBD><EFBFBD>ģʽ
DMA_Init(CW_DMACHANNEL2, &DMA_InitStruct);
DMA_Cmd(CW_DMACHANNEL2, ENABLE);
DMA_InitStruct.DMA_DstAddress = (uint32_t)&CW_ADC->START; // Ŀ<><C4BF><EFBFBD><EFBFBD>ַ
DMA_InitStruct.DMA_DstInc = DMA_DstAddress_Fix; // Ŀ<><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD>̶<EFBFBD>
DMA_InitStruct.DMA_Mode = DMA_MODE_BLOCK; // BLOCK<43><4B><EFBFBD><EFBFBD>ģʽ
DMA_InitStruct.DMA_SrcAddress = (uint32_t)&ADC_Start; // Դ<><D4B4>ַ
DMA_InitStruct.DMA_SrcInc = DMA_SrcAddress_Fix; // Դ<><D4B4>ַ<EFBFBD>̶<EFBFBD>
DMA_InitStruct.DMA_TransferCnt = 0x3; // DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_InitStruct.DMA_TransferWidth = DMA_TRANSFER_WIDTH_8BIT; // <20><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>8bit
DMA_InitStruct.HardTrigSource = DMA_HardTrig_ADC_TRANSCOMPLETE; // ADCת<43><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>
DMA_InitStruct.TrigMode = DMA_HardTrig; // Ӳ<><D3B2><EFBFBD><EFBFBD>ģʽ
DMA_Init(CW_DMACHANNEL3, &DMA_InitStruct);
DMA_Cmd(CW_DMACHANNEL3, ENABLE);
DMA_InitStruct.DMA_DstAddress = (uint32_t)&CW_ADC->START; // Ŀ<><C4BF><EFBFBD><EFBFBD>ַ
DMA_InitStruct.DMA_DstInc = DMA_DstAddress_Fix; // Ŀ<><C4BF><EFBFBD><EFBFBD>ַ<EFBFBD>̶<EFBFBD>
DMA_InitStruct.DMA_Mode = DMA_MODE_BLOCK; // BLOCK<43><4B><EFBFBD><EFBFBD>ģʽ
DMA_InitStruct.DMA_SrcAddress = (uint32_t)&ADC_Start; // Դ<><D4B4>ַ
DMA_InitStruct.DMA_SrcInc = DMA_SrcAddress_Fix; // Դ<><D4B4>ַ<EFBFBD>̶<EFBFBD>
DMA_InitStruct.DMA_TransferCnt = 0x1; // DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_InitStruct.DMA_TransferWidth = DMA_TRANSFER_WIDTH_8BIT; // <20><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>8bit
DMA_InitStruct.HardTrigSource = DMA_HardTrig_ATIM_CH1A2A3A4; // ATIMӲ<4D><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DMA_InitStruct.TrigMode = DMA_HardTrig; // Ӳ<><D3B2><EFBFBD><EFBFBD>ģʽ
DMA_Init(CW_DMACHANNEL4, &DMA_InitStruct);
DMA_Cmd(CW_DMACHANNEL4, ENABLE);
DMA_ITConfig(CW_DMACHANNEL1, DMA_IT_TC, ENABLE);
__disable_irq();
NVIC_EnableIRQ(DMACH1_IRQn);
__enable_irq();
}
void DMACH1_IRQHandlerCallBack(void)
{
CW_DMA->ICR_f.TC1 = 0x00; // <20><><EFBFBD>жϱ<D0B6>־
CW_ATIM->ICR = 0x00; // <20><>ATIM<49><4D><EFBFBD>жϱ<D0B6>־
CW_ADC->ICR = 0x00; // <20><>ADC<44><43><EFBFBD>жϱ<D0B6>־
CW_ADC->CR1 = 0x83; // AdcIn = ch0
//------------------------------------------------
// DMA.CH1 : ADC_Result -> RAM
CW_DMACHANNEL1->CNT = 0x10004; //<2F><>4<EFBFBD><34>
CW_DMACHANNEL1->SRCADDR = (uint32_t)(&CW_ADC->RESULT0);
CW_DMACHANNEL1->DSTADDR = (uint32_t)(&SampleData[0]);
CW_DMACHANNEL1->CSR_f.EN = 1;
//------------------------------------------------
// DMA.CH2 : RAM -> ADC_CR1
CW_DMACHANNEL2->CNT = 0x10003; //<2F><>3<EFBFBD><33>
CW_DMACHANNEL2->SRCADDR = (uint32_t)(&ADC_CR1Array[1]);
CW_DMACHANNEL2->DSTADDR = (uint32_t)(&CW_ADC->CR1);
CW_DMACHANNEL2->CSR_f.EN = 1;
//------------------------------------------------
// DMA.CH3 : RAM -> ADC_START
CW_DMACHANNEL3->CNT = 0x10003; //<2F><>3<EFBFBD><33>
CW_DMACHANNEL3->SRCADDR = (uint32_t)(&ADC_Start);
CW_DMACHANNEL3->DSTADDR = (uint32_t)(&CW_ADC->START);
CW_DMACHANNEL3->CSR_f.EN = 1;
//------------------------------------------------
// DMA.CH4 : RAM -> ADC_START
CW_DMACHANNEL4->CNT = 0x10001; //<2F><>1<EFBFBD><31>
CW_DMACHANNEL4->SRCADDR = (uint32_t)(&ADC_Start);
CW_DMACHANNEL4->DSTADDR = (uint32_t)(&CW_ADC->START);
CW_DMACHANNEL4->CSR_f.EN = 1;
}
void BTIM_init(void)
{
//1MS 48m/16/3000
BTIM_TimeBaseInitTypeDef BTIM_InitStruct;
__RCC_BTIM_CLK_ENABLE();
__disable_irq();
NVIC_EnableIRQ(BTIM1_IRQn);
__enable_irq();
BTIM_InitStruct.BTIM_Mode = BTIM_Mode_TIMER; //1ms<6D><73>ʱ<EFBFBD><CAB1>
BTIM_InitStruct.BTIM_OPMode = BTIM_OPMode_Repetitive;
BTIM_InitStruct.BTIM_Period = 3000;
BTIM_InitStruct.BTIM_Prescaler = BTIM_PRS_DIV16;
BTIM_TimeBaseInit(CW_BTIM1, &BTIM_InitStruct);
BTIM_ITConfig(CW_BTIM1, BTIM_IT_OV, ENABLE);
BTIM_Cmd(CW_BTIM1, ENABLE);
}
//void UART3_IRQHandler()
//{ //δ<><CEB4>
// // unsigned char tx;
//
// if(USART_GetITStatus(CW_UART3, USART_IT_RC) != RESET)
// {
// USART_ClearITPendingBit(CW_UART3, USART_IT_RC);
// // tx = USART_ReceiveData_8bit(CW_UART3);
// }
//}