1083 lines
66 KiB
C
1083 lines
66 KiB
C
#ifndef __CW32F03x_GPIO_H__
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#define __CW32F03x_GPIO_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*****************************************************************************/
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/* Include files */
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/*****************************************************************************/
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#include "base_types.h"
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#include "cw32f030.h"
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/*****************************************************************************/
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/* Global pre-processor symbols/macros ('#define') */
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/*****************************************************************************/
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typedef struct
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{
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uint32_t Pins;
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uint32_t Mode;
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uint32_t IT;
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uint32_t Speed;
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} GPIO_InitTypeDef;
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typedef enum
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{
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GPIO_Pin_RESET = 0,
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GPIO_Pin_SET
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} GPIO_PinState;
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//============================================================
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void GPIO_SWD2GPIO(void);
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void GPIO_GPIO2SWD(void);
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void GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pins);
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void GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pins);
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void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
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void GPIO_ConfigFilter(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pins, uint32_t FltClk);
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void GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pins, GPIO_PinState PinState);
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void GPIO_HighByte_Write(GPIO_TypeDef *GPIOx, uint8_t Value);
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void GPIO_LowByte_Write(GPIO_TypeDef *GPIOx, uint8_t Value);
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void GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pins);
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GPIO_PinState GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
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//============================================================
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#define GPIO_MODE_ANALOG (0X00)
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#define GPIO_MODE_INPUT (0x10)
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#define GPIO_MODE_INPUT_PULLUP (0x11)
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#define GPIO_MODE_INPUT_PULLDOWN (0x12)
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#define GPIO_MODE_OUTPUT_PP (0x20)
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#define GPIO_MODE_OUTPUT_OD (0x21)
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#define GPIO_IT_NONE (0x80)
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#define GPIO_IT_RISING (0x81)
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#define GPIO_IT_FALLING (0x82)
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#define GPIO_IT_HIGH (0x84)
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#define GPIO_IT_LOW (0x88)
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#define GPIO_SPEED_LOW (0x0000)
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#define GPIO_SPEED_HIGH (0xFFFF)
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//============================================================
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#define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
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#define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
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#define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
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#define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
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#define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
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#define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
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#define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
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#define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
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#define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
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#define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
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#define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
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#define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
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#define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
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#define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
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#define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
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#define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
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#define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
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//============================================================
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//<2F>˿<EFBFBD><CBBF>˲<EFBFBD><CBB2><EFBFBD><EFBFBD><EFBFBD>
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#define GPIO_FLTCLK_HCLK2 (((uint32_t)0) << 16)
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#define GPIO_FLTCLK_HCLK4 (((uint32_t)1) << 16)
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#define GPIO_FLTCLK_HCLK8 (((uint32_t)2) << 16)
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#define GPIO_FLTCLK_BTIM1OV (((uint32_t)3) << 16)
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#define GPIO_FLTCLK_RC150K (((uint32_t)4) << 16)
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#define GPIO_FLTCLK_LSI (((uint32_t)5) << 16)
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#define GPIO_FLTCLK_RC10K (((uint32_t)6) << 16)
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//============================================================
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//<2F><><EFBFBD><EFBFBD>CW_GPIO<49>жϱ<D0B6>־
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#define GPIOA_INTFLAG_CLR(Mask) ((CW_GPIOA->ICR) = (~((uint32_t)(Mask))))
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#define GPIOB_INTFLAG_CLR(Mask) ((CW_GPIOB->ICR) = (~((uint32_t)(Mask))))
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#define GPIOC_INTFLAG_CLR(Mask) ((CW_GPIOC->ICR) = (~((uint32_t)(Mask))))
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#define GPIOF_INTFLAG_CLR(Mask) ((CW_GPIOF->ICR) = (~((uint32_t)(Mask))))
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//============================================================
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//ANALOG OR DIGTAL
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#define PA00_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN0 = 0)
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#define PA00_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN0 = 1)
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#define PA01_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN1 = 0)
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#define PA01_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN1 = 1)
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#define PA02_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN2 = 0)
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#define PA02_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN2 = 1)
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#define PA03_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN3 = 0)
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#define PA03_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN3 = 1)
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#define PA04_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN4 = 0)
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#define PA04_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN4 = 1)
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#define PA05_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN5 = 0)
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#define PA05_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN5 = 1)
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#define PA06_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN6 = 0)
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#define PA06_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN6 = 1)
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#define PA07_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN7 = 0)
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#define PA07_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN7 = 1)
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#define PA08_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN8 = 0)
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#define PA08_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN8 = 1)
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#define PA09_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN9 = 0)
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#define PA09_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN9 = 1)
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#define PA10_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN10 = 0)
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#define PA10_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN10 = 1)
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#define PA11_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN11 = 0)
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#define PA11_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN11 = 1)
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#define PA12_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN12 = 0)
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#define PA12_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN12 = 1)
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#define PA13_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN13 = 0)
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#define PA13_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN13 = 1)
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#define PA14_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN14 = 0)
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#define PA14_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN14 = 1)
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#define PA15_DIGTAL_ENABLE() (CW_GPIOA->ANALOG_f.PIN15 = 0)
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#define PA15_ANALOG_ENABLE() (CW_GPIOA->ANALOG_f.PIN15 = 1)
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#define PB00_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN0 = 0)
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#define PB00_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN0 = 1)
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#define PB01_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN1 = 0)
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#define PB01_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN1 = 1)
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#define PB02_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN2 = 0)
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#define PB02_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN2 = 1)
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#define PB03_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN3 = 0)
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#define PB03_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN3 = 1)
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#define PB04_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN4 = 0)
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#define PB04_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN4 = 1)
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#define PB05_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN5 = 0)
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#define PB05_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN5 = 1)
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#define PB06_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN6 = 0)
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#define PB06_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN6 = 1)
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#define PB07_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN7 = 0)
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#define PB07_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN7 = 1)
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#define PB08_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN8 = 0)
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#define PB08_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN8 = 1)
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#define PB09_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN9 = 0)
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#define PB09_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN9 = 1)
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#define PB10_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN10 = 0)
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#define PB10_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN10 = 1)
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#define PB11_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN11 = 0)
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#define PB11_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN11 = 1)
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#define PB12_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN12 = 0)
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#define PB12_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN12 = 1)
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#define PB13_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN13 = 0)
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#define PB13_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN13 = 1)
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#define PB14_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN14 = 0)
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#define PB14_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN14 = 1)
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#define PB15_DIGTAL_ENABLE() (CW_GPIOB->ANALOG_f.PIN15 = 0)
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#define PB15_ANALOG_ENABLE() (CW_GPIOB->ANALOG_f.PIN15 = 1)
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#define PC13_DIGTAL_ENABLE() (CW_GPIOC->ANALOG_f.PIN13 = 0)
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#define PC13_ANALOG_ENABLE() (CW_GPIOC->ANALOG_f.PIN13 = 1)
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#define PC14_DIGTAL_ENABLE() (CW_GPIOC->ANALOG_f.PIN14 = 0)
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#define PC14_ANALOG_ENABLE() (CW_GPIOC->ANALOG_f.PIN14 = 1)
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#define PC15_DIGTAL_ENABLE() (CW_GPIOC->ANALOG_f.PIN15 = 0)
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#define PC15_ANALOG_ENABLE() (CW_GPIOC->ANALOG_f.PIN15 = 1)
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#define PF00_DIGTAL_ENABLE() (CW_GPIOF->ANALOG_f.PIN0 = 0)
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#define PF00_ANALOG_ENABLE() (CW_GPIOF->ANALOG_f.PIN0 = 1)
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#define PF01_DIGTAL_ENABLE() (CW_GPIOF->ANALOG_f.PIN1 = 0)
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#define PF01_ANALOG_ENABLE() (CW_GPIOF->ANALOG_f.PIN1 = 1)
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#define PF06_DIGTAL_ENABLE() (CW_GPIOF->ANALOG_f.PIN6 = 0)
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#define PF06_ANALOG_ENABLE() (CW_GPIOF->ANALOG_f.PIN6 = 1)
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#define PF07_DIGTAL_ENABLE() (CW_GPIOF->ANALOG_f.PIN7 = 0)
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#define PF07_ANALOG_ENABLE() (CW_GPIOF->ANALOG_f.PIN7 = 1)
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#define PF03_DIGTAL_ENABLE() (CW_GPIOF->ANALOG_f.PIN3 = 0)
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#define PF03_ANALOG_ENABLE() (CW_GPIOF->ANALOG_f.PIN3 = 1)
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//============================================================
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// INPUTAND OUTPUT
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#define PA00_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN0 = 0)
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#define PA00_DIR_INPUT() (CW_GPIOA->DIR_f.PIN0 = 1)
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#define PA01_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN1 = 0)
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#define PA01_DIR_INPUT() (CW_GPIOA->DIR_f.PIN1 = 1)
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#define PA02_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN2 = 0)
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#define PA02_DIR_INPUT() (CW_GPIOA->DIR_f.PIN2 = 1)
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#define PA03_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN3 = 0)
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#define PA03_DIR_INPUT() (CW_GPIOA->DIR_f.PIN3 = 1)
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#define PA04_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN4 = 0)
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#define PA04_DIR_INPUT() (CW_GPIOA->DIR_f.PIN4 = 1)
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#define PA05_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN5 = 0)
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#define PA05_DIR_INPUT() (CW_GPIOA->DIR_f.PIN5 = 1)
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#define PA06_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN6 = 0)
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#define PA06_DIR_INPUT() (CW_GPIOA->DIR_f.PIN6 = 1)
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#define PA07_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN7 = 0)
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#define PA07_DIR_INPUT() (CW_GPIOA->DIR_f.PIN7 = 1)
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#define PA08_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN8 = 0)
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#define PA08_DIR_INPUT() (CW_GPIOA->DIR_f.PIN8 = 1)
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#define PA09_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN9 = 0)
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#define PA09_DIR_INPUT() (CW_GPIOA->DIR_f.PIN9 = 1)
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#define PA10_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN10 = 0)
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#define PA10_DIR_INPUT() (CW_GPIOA->DIR_f.PIN10 = 1)
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#define PA11_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN11 = 0)
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#define PA11_DIR_INPUT() (CW_GPIOA->DIR_f.PIN11 = 1)
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#define PA12_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN12 = 0)
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#define PA12_DIR_INPUT() (CW_GPIOA->DIR_f.PIN12 = 1)
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#define PA13_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN13 = 0)
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#define PA13_DIR_INPUT() (CW_GPIOA->DIR_f.PIN13 = 1)
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#define PA14_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN14 = 0)
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#define PA14_DIR_INPUT() (CW_GPIOA->DIR_f.PIN14 = 1)
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#define PA15_DIR_OUTPUT() (CW_GPIOA->DIR_f.PIN15 = 0)
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#define PA15_DIR_INPUT() (CW_GPIOA->DIR_f.PIN15 = 1)
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#define PB00_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN0 = 0)
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#define PB00_DIR_INPUT() (CW_GPIOB->DIR_f.PIN0 = 1)
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#define PB01_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN1 = 0)
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#define PB01_DIR_INPUT() (CW_GPIOB->DIR_f.PIN1 = 1)
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#define PB02_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN2 = 0)
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#define PB02_DIR_INPUT() (CW_GPIOB->DIR_f.PIN2 = 1)
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#define PB03_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN3 = 0)
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#define PB03_DIR_INPUT() (CW_GPIOB->DIR_f.PIN3 = 1)
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#define PB04_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN4 = 0)
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#define PB04_DIR_INPUT() (CW_GPIOB->DIR_f.PIN4 = 1)
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#define PB05_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN5 = 0)
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#define PB05_DIR_INPUT() (CW_GPIOB->DIR_f.PIN5 = 1)
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#define PB06_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN6 = 0)
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#define PB06_DIR_INPUT() (CW_GPIOB->DIR_f.PIN6 = 1)
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#define PB07_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN7 = 0)
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#define PB07_DIR_INPUT() (CW_GPIOB->DIR_f.PIN7 = 1)
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#define PB08_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN8 = 0)
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#define PB08_DIR_INPUT() (CW_GPIOB->DIR_f.PIN8 = 1)
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#define PB09_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN9 = 0)
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#define PB09_DIR_INPUT() (CW_GPIOB->DIR_f.PIN9 = 1)
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#define PB10_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN10 = 0)
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#define PB10_DIR_INPUT() (CW_GPIOB->DIR_f.PIN10 = 1)
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#define PB11_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN11 = 0)
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#define PB11_DIR_INPUT() (CW_GPIOB->DIR_f.PIN11 = 1)
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#define PB12_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN12 = 0)
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#define PB12_DIR_INPUT() (CW_GPIOB->DIR_f.PIN12 = 1)
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#define PB13_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN13 = 0)
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#define PB13_DIR_INPUT() (CW_GPIOB->DIR_f.PIN13 = 1)
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#define PB14_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN14 = 0)
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#define PB14_DIR_INPUT() (CW_GPIOB->DIR_f.PIN14 = 1)
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#define PB15_DIR_OUTPUT() (CW_GPIOB->DIR_f.PIN15 = 0)
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#define PB15_DIR_INPUT() (CW_GPIOB->DIR_f.PIN15 = 1)
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#define PC13_DIR_OUTPUT() (CW_GPIOC->DIR_f.PIN13 = 0)
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#define PC13_DIR_INPUT() (CW_GPIOC->DIR_f.PIN13 = 1)
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#define PC14_DIR_OUTPUT() (CW_GPIOC->DIR_f.PIN14 = 0)
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#define PC14_DIR_INPUT() (CW_GPIOC->DIR_f.PIN14 = 1)
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#define PC15_DIR_OUTPUT() (CW_GPIOC->DIR_f.PIN15 = 0)
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#define PC15_DIR_INPUT() (CW_GPIOC->DIR_f.PIN15 = 1)
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#define PF00_DIR_OUTPUT() (CW_GPIOF->DIR_f.PIN0 = 0)
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#define PF00_DIR_INPUT() (CW_GPIOF->DIR_f.PIN0 = 1)
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#define PF01_DIR_OUTPUT() (CW_GPIOF->DIR_f.PIN1 = 0)
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#define PF01_DIR_INPUT() (CW_GPIOF->DIR_f.PIN1 = 1)
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#define PF06_DIR_OUTPUT() (CW_GPIOF->DIR_f.PIN6 = 0)
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#define PF06_DIR_INPUT() (CW_GPIOF->DIR_f.PIN6 = 1)
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#define PF07_DIR_OUTPUT() (CW_GPIOF->DIR_f.PIN7 = 0)
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#define PF07_DIR_INPUT() (CW_GPIOF->DIR_f.PIN7 = 1)
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#define PF03_DIR_OUTPUT() (CW_GPIOF->DIR_f.PIN3 = 0)
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#define PF03_DIR_INPUT() (CW_GPIOF->DIR_f.PIN3 = 1)
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//============================================================
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//push-pull or opendrain
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#define PA00_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN0 = 0)
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#define PA00_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN0 = 1)
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#define PA01_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN1 = 0)
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#define PA01_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN1 = 1)
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#define PA02_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN2 = 0)
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#define PA02_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN2 = 1)
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#define PA03_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN3 = 0)
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#define PA03_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN3 = 1)
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#define PA04_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN4 = 0)
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#define PA04_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN4 = 1)
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#define PA05_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN5 = 0)
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#define PA05_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN5 = 1)
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#define PA06_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN6 = 0)
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#define PA06_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN6 = 1)
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#define PA07_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN7 = 0)
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#define PA07_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN7 = 1)
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#define PA08_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN8 = 0)
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#define PA08_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN8 = 1)
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||
#define PA09_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN9 = 0)
|
||
#define PA09_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN9 = 1)
|
||
#define PA10_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN10 = 0)
|
||
#define PA10_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN10 = 1)
|
||
#define PA11_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN11 = 0)
|
||
#define PA11_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN11 = 1)
|
||
#define PA12_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN12 = 0)
|
||
#define PA12_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN12 = 1)
|
||
#define PA13_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN13 = 0)
|
||
#define PA13_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN13 = 1)
|
||
#define PA14_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN14 = 0)
|
||
#define PA14_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN14 = 1)
|
||
#define PA15_PUSHPULL_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN15 = 0)
|
||
#define PA15_OPENDRAIN_ENABLE() (CW_GPIOA->OPENDRAIN_f.PIN15 = 1)
|
||
#define PB00_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN0 = 0)
|
||
#define PB00_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN0 = 1)
|
||
#define PB01_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN1 = 0)
|
||
#define PB01_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN1 = 1)
|
||
#define PB02_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN2 = 0)
|
||
#define PB02_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN2 = 1)
|
||
#define PB03_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN3 = 0)
|
||
#define PB03_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN3 = 1)
|
||
#define PB04_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN4 = 0)
|
||
#define PB04_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN4 = 1)
|
||
#define PB05_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN5 = 0)
|
||
#define PB05_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN5 = 1)
|
||
#define PB06_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN6 = 0)
|
||
#define PB06_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN6 = 1)
|
||
#define PB07_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN7 = 0)
|
||
#define PB07_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN7 = 1)
|
||
#define PB08_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN8 = 0)
|
||
#define PB08_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN8 = 1)
|
||
#define PB09_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN9 = 0)
|
||
#define PB09_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN9 = 1)
|
||
#define PB10_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN10 = 0)
|
||
#define PB10_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN10 = 1)
|
||
#define PB11_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN11 = 0)
|
||
#define PB11_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN11 = 1)
|
||
#define PB12_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN12 = 0)
|
||
#define PB12_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN12 = 1)
|
||
#define PB13_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN13 = 0)
|
||
#define PB13_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN13 = 1)
|
||
#define PB14_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN14 = 0)
|
||
#define PB14_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN14 = 1)
|
||
#define PB15_PUSHPULL_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN15 = 0)
|
||
#define PB15_OPENDRAIN_ENABLE() (CW_GPIOB->OPENDRAIN_f.PIN15 = 1)
|
||
#define PC13_PUSHPULL_ENABLE() (CW_GPIOC->OPENDRAIN_f.PIN13 = 0)
|
||
#define PC13_OPENDRAIN_ENABLE() (CW_GPIOC->OPENDRAIN_f.PIN13 = 1)
|
||
#define PC14_PUSHPULL_ENABLE() (CW_GPIOC->OPENDRAIN_f.PIN14 = 0)
|
||
#define PC14_OPENDRAIN_ENABLE() (CW_GPIOC->OPENDRAIN_f.PIN14 = 1)
|
||
#define PC15_PUSHPULL_ENABLE() (CW_GPIOC->OPENDRAIN_f.PIN15 = 0)
|
||
#define PC15_OPENDRAIN_ENABLE() (CW_GPIOC->OPENDRAIN_f.PIN15 = 1)
|
||
#define PF00_PUSHPULL_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN0 = 0)
|
||
#define PF00_OPENDRAIN_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN0 = 1)
|
||
#define PF01_PUSHPULL_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN1 = 0)
|
||
#define PF01_OPENDRAIN_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN1 = 1)
|
||
#define PF06_PUSHPULL_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN6 = 0)
|
||
#define PF06_OPENDRAIN_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN6 = 1)
|
||
#define PF07_PUSHPULL_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN7 = 0)
|
||
#define PF07_OPENDRAIN_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN7 = 1)
|
||
#define PF03_PUSHPULL_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN3 = 0)
|
||
#define PF03_OPENDRAIN_ENABLE() (CW_GPIOF->OPENDRAIN_f.PIN3 = 1)
|
||
|
||
//============================================================
|
||
// SPEED
|
||
#define PA00_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN0 = 0)
|
||
#define PA00_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN0 = 1)
|
||
#define PA01_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN1 = 0)
|
||
#define PA01_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN1 = 1)
|
||
#define PA02_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN2 = 0)
|
||
#define PA02_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN2 = 1)
|
||
#define PA03_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN3 = 0)
|
||
#define PA03_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN3 = 1)
|
||
#define PA04_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN4 = 0)
|
||
#define PA04_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN4 = 1)
|
||
#define PA05_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN5 = 0)
|
||
#define PA05_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN5 = 1)
|
||
#define PA06_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN6 = 0)
|
||
#define PA06_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN6 = 1)
|
||
#define PA07_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN7 = 0)
|
||
#define PA07_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN7 = 1)
|
||
#define PA08_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN8 = 0)
|
||
#define PA08_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN8 = 1)
|
||
#define PA09_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN9 = 0)
|
||
#define PA09_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN9 = 1)
|
||
#define PA10_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN10 = 0)
|
||
#define PA10_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN10 = 1)
|
||
#define PA11_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN11 = 0)
|
||
#define PA11_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN11 = 1)
|
||
#define PA12_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN12 = 0)
|
||
#define PA12_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN12 = 1)
|
||
#define PA13_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN13 = 0)
|
||
#define PA13_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN13 = 1)
|
||
#define PA14_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN14 = 0)
|
||
#define PA14_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN14 = 1)
|
||
#define PA15_SPEED_LOW() (CW_GPIOA->SPEED_f.PIN15 = 0)
|
||
#define PA15_SPEED_HIGH() (CW_GPIOA->SPEED_f.PIN15 = 1)
|
||
#define PB00_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN0 = 0)
|
||
#define PB00_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN0 = 1)
|
||
#define PB01_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN1 = 0)
|
||
#define PB01_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN1 = 1)
|
||
#define PB02_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN2 = 0)
|
||
#define PB02_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN2 = 1)
|
||
#define PB03_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN3 = 0)
|
||
#define PB03_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN3 = 1)
|
||
#define PB04_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN4 = 0)
|
||
#define PB04_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN4 = 1)
|
||
#define PB05_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN5 = 0)
|
||
#define PB05_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN5 = 1)
|
||
#define PB06_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN6 = 0)
|
||
#define PB06_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN6 = 1)
|
||
#define PB07_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN7 = 0)
|
||
#define PB07_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN7 = 1)
|
||
#define PB08_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN8 = 0)
|
||
#define PB08_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN8 = 1)
|
||
#define PB09_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN9 = 0)
|
||
#define PB09_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN9 = 1)
|
||
#define PB10_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN10 = 0)
|
||
#define PB10_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN10 = 1)
|
||
#define PB11_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN11 = 0)
|
||
#define PB11_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN11 = 1)
|
||
#define PB12_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN12 = 0)
|
||
#define PB12_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN12 = 1)
|
||
#define PB13_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN13 = 0)
|
||
#define PB13_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN13 = 1)
|
||
#define PB14_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN14 = 0)
|
||
#define PB14_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN14 = 1)
|
||
#define PB15_SPEED_LOW() (CW_GPIOB->SPEED_f.PIN15 = 0)
|
||
#define PB15_SPEED_HIGH() (CW_GPIOB->SPEED_f.PIN15 = 1)
|
||
#define PC13_SPEED_LOW() (CW_GPIOC->SPEED_f.PIN13 = 0)
|
||
#define PC13_SPEED_HIGH() (CW_GPIOC->SPEED_f.PIN13 = 1)
|
||
#define PC14_SPEED_LOW() (CW_GPIOC->SPEED_f.PIN14 = 0)
|
||
#define PC14_SPEED_HIGH() (CW_GPIOC->SPEED_f.PIN14 = 1)
|
||
#define PC15_SPEED_LOW() (CW_GPIOC->SPEED_f.PIN15 = 0)
|
||
#define PC15_SPEED_HIGH() (CW_GPIOC->SPEED_f.PIN15 = 1)
|
||
#define PF00_SPEED_LOW() (CW_GPIOF->SPEED_f.PIN0 = 0)
|
||
#define PF00_SPEED_HIGH() (CW_GPIOF->SPEED_f.PIN0 = 1)
|
||
#define PF01_SPEED_LOW() (CW_GPIOF->SPEED_f.PIN1 = 0)
|
||
#define PF01_SPEED_HIGH() (CW_GPIOF->SPEED_f.PIN1 = 1)
|
||
#define PF06_SPEED_LOW() (CW_GPIOF->SPEED_f.PIN6 = 0)
|
||
#define PF06_SPEED_HIGH() (CW_GPIOF->SPEED_f.PIN6 = 1)
|
||
#define PF07_SPEED_LOW() (CW_GPIOF->SPEED_f.PIN7 = 0)
|
||
|
||
//============================================================
|
||
//PUR
|
||
#define PA00_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN0 = 1)
|
||
#define PA00_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN0 = 0)
|
||
#define PA01_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN1 = 1)
|
||
#define PA01_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN1 = 0)
|
||
#define PA02_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN2 = 1)
|
||
#define PA02_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN2 = 0)
|
||
#define PA03_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN3 = 1)
|
||
#define PA03_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN3 = 0)
|
||
#define PA04_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN4 = 1)
|
||
#define PA04_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN4 = 0)
|
||
#define PA05_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN5 = 1)
|
||
#define PA05_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN5 = 0)
|
||
#define PA06_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN6 = 1)
|
||
#define PA06_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN6 = 0)
|
||
#define PA07_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN7 = 1)
|
||
#define PA07_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN7 = 0)
|
||
#define PA08_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN8 = 1)
|
||
#define PA08_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN8 = 0)
|
||
#define PA09_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN9 = 1)
|
||
#define PA09_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN9 = 0)
|
||
#define PA10_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN10 = 1)
|
||
#define PA10_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN10 = 0)
|
||
#define PA11_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN11 = 1)
|
||
#define PA11_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN11 = 0)
|
||
#define PA12_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN12 = 1)
|
||
#define PA12_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN12 = 0)
|
||
#define PA13_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN13 = 1)
|
||
#define PA13_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN13 = 0)
|
||
#define PA14_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN14 = 1)
|
||
#define PA14_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN14 = 0)
|
||
#define PA15_PUR_ENABLE() (CW_GPIOA->PUR_f.PIN15 = 1)
|
||
#define PA15_PUR_DISABLE() (CW_GPIOA->PUR_f.PIN15 = 0)
|
||
#define PB00_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN0 = 1)
|
||
#define PB00_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN0 = 0)
|
||
#define PB01_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN1 = 1)
|
||
#define PB01_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN1 = 0)
|
||
#define PB02_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN2 = 1)
|
||
#define PB02_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN2 = 0)
|
||
#define PB03_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN3 = 1)
|
||
#define PB03_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN3 = 0)
|
||
#define PB04_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN4 = 1)
|
||
#define PB04_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN4 = 0)
|
||
#define PB05_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN5 = 1)
|
||
#define PB05_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN5 = 0)
|
||
#define PB06_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN6 = 1)
|
||
#define PB06_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN6 = 0)
|
||
#define PB07_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN7 = 1)
|
||
#define PB07_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN7 = 0)
|
||
#define PB08_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN8 = 1)
|
||
#define PB08_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN8 = 0)
|
||
#define PB09_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN9 = 1)
|
||
#define PB09_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN9 = 0)
|
||
#define PB10_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN10 = 1)
|
||
#define PB10_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN10 = 0)
|
||
#define PB11_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN11 = 1)
|
||
#define PB11_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN11 = 0)
|
||
#define PB12_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN12 = 1)
|
||
#define PB12_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN12 = 0)
|
||
#define PB13_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN13 = 1)
|
||
#define PB13_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN13 = 0)
|
||
#define PB14_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN14 = 1)
|
||
#define PB14_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN14 = 0)
|
||
#define PB15_PUR_ENABLE() (CW_GPIOB->PUR_f.PIN15 = 1)
|
||
#define PB15_PUR_DISABLE() (CW_GPIOB->PUR_f.PIN15 = 0)
|
||
#define PC13_PUR_ENABLE() (CW_GPIOC->PUR_f.PIN13 = 1)
|
||
#define PC13_PUR_DISABLE() (CW_GPIOC->PUR_f.PIN13 = 0)
|
||
#define PC14_PUR_ENABLE() (CW_GPIOC->PUR_f.PIN14 = 1)
|
||
#define PC14_PUR_DISABLE() (CW_GPIOC->PUR_f.PIN14 = 0)
|
||
#define PC15_PUR_ENABLE() (CW_GPIOC->PUR_f.PIN15 = 1)
|
||
#define PC15_PUR_DISABLE() (CW_GPIOC->PUR_f.PIN15 = 0)
|
||
#define PF00_PUR_ENABLE() (CW_GPIOF->PUR_f.PIN0 = 1)
|
||
#define PF00_PUR_DISABLE() (CW_GPIOF->PUR_f.PIN0 = 0)
|
||
#define PF01_PUR_ENABLE() (CW_GPIOF->PUR_f.PIN1 = 1)
|
||
#define PF01_PUR_DISABLE() (CW_GPIOF->PUR_f.PIN1 = 0)
|
||
#define PF06_PUR_ENABLE() (CW_GPIOF->PUR_f.PIN6 = 1)
|
||
#define PF06_PUR_DISABLE() (CW_GPIOF->PUR_f.PIN6 = 0)
|
||
#define PF07_PUR_ENABLE() (CW_GPIOF->PUR_f.PIN7 = 1)
|
||
#define PF07_PUR_DISABLE() (CW_GPIOF->PUR_f.PIN7 = 0)
|
||
#define PF03_PUR_ENABLE() (CW_GPIOF->PUR_f.PIN3 = 1)
|
||
#define PF03_PUR_DISABLE() (CW_GPIOF->PUR_f.PIN3 = 0)
|
||
|
||
//============================================================
|
||
//PDR
|
||
#define PA00_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN0 = 1)
|
||
#define PA00_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN0 = 0)
|
||
#define PA01_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN1 = 1)
|
||
#define PA01_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN1 = 0)
|
||
#define PA02_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN2 = 1)
|
||
#define PA02_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN2 = 0)
|
||
#define PA03_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN3 = 1)
|
||
#define PA03_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN3 = 0)
|
||
#define PA04_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN4 = 1)
|
||
#define PA04_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN4 = 0)
|
||
#define PA05_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN5 = 1)
|
||
#define PA05_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN5 = 0)
|
||
#define PA06_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN6 = 1)
|
||
#define PA06_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN6 = 0)
|
||
#define PA07_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN7 = 1)
|
||
#define PA07_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN7 = 0)
|
||
#define PA08_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN8 = 1)
|
||
#define PA08_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN8 = 0)
|
||
#define PA09_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN9 = 1)
|
||
#define PA09_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN9 = 0)
|
||
#define PA10_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN10 = 1)
|
||
#define PA10_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN10 = 0)
|
||
#define PA11_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN11 = 1)
|
||
#define PA11_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN11 = 0)
|
||
#define PA12_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN12 = 1)
|
||
#define PA12_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN12 = 0)
|
||
#define PA13_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN13 = 1)
|
||
#define PA13_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN13 = 0)
|
||
#define PA14_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN14 = 1)
|
||
#define PA14_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN14 = 0)
|
||
#define PA15_PDR_ENABLE() (CW_GPIOA->PDR_f.PIN15 = 1)
|
||
#define PA15_PDR_DISABLE() (CW_GPIOA->PDR_f.PIN15 = 0)
|
||
#define PB00_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN0 = 1)
|
||
#define PB00_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN0 = 0)
|
||
#define PB01_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN1 = 1)
|
||
#define PB01_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN1 = 0)
|
||
#define PB02_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN2 = 1)
|
||
#define PB02_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN2 = 0)
|
||
#define PB03_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN3 = 1)
|
||
#define PB03_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN3 = 0)
|
||
#define PB04_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN4 = 1)
|
||
#define PB04_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN4 = 0)
|
||
#define PB05_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN5 = 1)
|
||
#define PB05_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN5 = 0)
|
||
#define PB06_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN6 = 1)
|
||
#define PB06_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN6 = 0)
|
||
#define PB07_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN7 = 1)
|
||
#define PB07_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN7 = 0)
|
||
#define PB08_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN8 = 1)
|
||
#define PB08_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN8 = 0)
|
||
#define PB09_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN9 = 1)
|
||
#define PB09_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN9 = 0)
|
||
#define PB10_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN10 = 1)
|
||
#define PB10_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN10 = 0)
|
||
#define PB11_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN11 = 1)
|
||
#define PB11_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN11 = 0)
|
||
#define PB12_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN12 = 1)
|
||
#define PB12_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN12 = 0)
|
||
#define PB13_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN13 = 1)
|
||
#define PB13_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN13 = 0)
|
||
#define PB14_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN14 = 1)
|
||
#define PB14_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN14 = 0)
|
||
#define PB15_PDR_ENABLE() (CW_GPIOB->PDR_f.PIN15 = 1)
|
||
#define PB15_PDR_DISABLE() (CW_GPIOB->PDR_f.PIN15 = 0)
|
||
#define PC13_PDR_ENABLE() (CW_GPIOC->PDR_f.PIN13 = 1)
|
||
#define PC13_PDR_DISABLE() (CW_GPIOC->PDR_f.PIN13 = 0)
|
||
#define PC14_PDR_ENABLE() (CW_GPIOC->PDR_f.PIN14 = 1)
|
||
#define PC14_PDR_DISABLE() (CW_GPIOC->PDR_f.PIN14 = 0)
|
||
#define PC15_PDR_ENABLE() (CW_GPIOC->PDR_f.PIN15 = 1)
|
||
#define PC15_PDR_DISABLE() (CW_GPIOC->PDR_f.PIN15 = 0)
|
||
#define PF00_PDR_ENABLE() (CW_GPIOF->PDR_f.PIN0 = 1)
|
||
#define PF00_PDR_DISABLE() (CW_GPIOF->PDR_f.PIN0 = 0)
|
||
#define PF01_PDR_ENABLE() (CW_GPIOF->PDR_f.PIN1 = 1)
|
||
#define PF01_PDR_DISABLE() (CW_GPIOF->PDR_f.PIN1 = 0)
|
||
#define PF06_PDR_ENABLE() (CW_GPIOF->PDR_f.PIN6 = 1)
|
||
#define PF06_PDR_DISABLE() (CW_GPIOF->PDR_f.PIN6 = 0)
|
||
#define PF07_PDR_ENABLE() (CW_GPIOF->PDR_f.PIN7 = 1)
|
||
#define PF07_PDR_DISABLE() (CW_GPIOF->PDR_f.PIN7 = 0)
|
||
#define PF03_PDR_ENABLE() (CW_GPIOF->PDR_f.PIN3 = 1)
|
||
#define PF03_PDR_DISABLE() (CW_GPIOF->PDR_f.PIN3 = 0)
|
||
|
||
//============================================================
|
||
// GETVALUE
|
||
#define PA00_GETVALUE() (CW_GPIOA->IDR & bv0)
|
||
#define PA01_GETVALUE() (CW_GPIOA->IDR & bv1)
|
||
#define PA02_GETVALUE() (CW_GPIOA->IDR & bv2)
|
||
#define PA03_GETVALUE() (CW_GPIOA->IDR & bv3)
|
||
#define PA04_GETVALUE() (CW_GPIOA->IDR & bv4)
|
||
#define PA05_GETVALUE() (CW_GPIOA->IDR & bv5)
|
||
#define PA06_GETVALUE() (CW_GPIOA->IDR & bv6)
|
||
#define PA07_GETVALUE() (CW_GPIOA->IDR & bv7)
|
||
#define PA08_GETVALUE() (CW_GPIOA->IDR & bv8)
|
||
#define PA09_GETVALUE() (CW_GPIOA->IDR & bv9)
|
||
#define PA10_GETVALUE() (CW_GPIOA->IDR & bv10)
|
||
#define PA11_GETVALUE() (CW_GPIOA->IDR & bv11)
|
||
#define PA12_GETVALUE() (CW_GPIOA->IDR & bv12)
|
||
#define PA13_GETVALUE() (CW_GPIOA->IDR & bv13)
|
||
#define PA14_GETVALUE() (CW_GPIOA->IDR & bv14)
|
||
#define PA15_GETVALUE() (CW_GPIOA->IDR & bv15)
|
||
#define PB00_GETVALUE() (CW_GPIOB->IDR & bv0)
|
||
#define PB01_GETVALUE() (CW_GPIOB->IDR & bv1)
|
||
#define PB02_GETVALUE() (CW_GPIOB->IDR & bv2)
|
||
#define PB03_GETVALUE() (CW_GPIOB->IDR & bv3)
|
||
#define PB04_GETVALUE() (CW_GPIOB->IDR & bv4)
|
||
#define PB05_GETVALUE() (CW_GPIOB->IDR & bv5)
|
||
#define PB06_GETVALUE() (CW_GPIOB->IDR & bv6)
|
||
#define PB07_GETVALUE() (CW_GPIOB->IDR & bv7)
|
||
#define PB08_GETVALUE() (CW_GPIOB->IDR & bv8)
|
||
#define PB09_GETVALUE() (CW_GPIOB->IDR & bv9)
|
||
#define PB10_GETVALUE() (CW_GPIOB->IDR & bv10)
|
||
#define PB11_GETVALUE() (CW_GPIOB->IDR & bv11)
|
||
#define PB12_GETVALUE() (CW_GPIOB->IDR & bv12)
|
||
#define PB13_GETVALUE() (CW_GPIOB->IDR & bv13)
|
||
#define PB14_GETVALUE() (CW_GPIOB->IDR & bv14)
|
||
#define PB15_GETVALUE() (CW_GPIOB->IDR & bv15)
|
||
#define PC13_GETVALUE() (CW_GPIOC->IDR & bv13)
|
||
#define PC14_GETVALUE() (CW_GPIOC->IDR & bv14)
|
||
#define PC15_GETVALUE() (CW_GPIOC->IDR & bv15)
|
||
#define PF00_GETVALUE() (CW_GPIOF->IDR & bv0)
|
||
#define PF01_GETVALUE() (CW_GPIOF->IDR & bv1)
|
||
#define PF06_GETVALUE() (CW_GPIOF->IDR & bv6)
|
||
#define PF07_GETVALUE() (CW_GPIOF->IDR & bv7)
|
||
#define PF03_GETVALUE() (CW_GPIOF->IDR & bv3)
|
||
|
||
//============================================================
|
||
// SET HIGH AND LOW
|
||
#define PA00_SETHIGH() (CW_GPIOA->BSRR = bv0)
|
||
#define PA00_SETLOW() (CW_GPIOA->BRR = bv0)
|
||
#define PA01_SETHIGH() (CW_GPIOA->BSRR = bv1)
|
||
#define PA01_SETLOW() (CW_GPIOA->BRR = bv1)
|
||
#define PA02_SETHIGH() (CW_GPIOA->BSRR = bv2)
|
||
#define PA02_SETLOW() (CW_GPIOA->BRR = bv2)
|
||
#define PA03_SETHIGH() (CW_GPIOA->BSRR = bv3)
|
||
#define PA03_SETLOW() (CW_GPIOA->BRR = bv3)
|
||
#define PA04_SETHIGH() (CW_GPIOA->BSRR = bv4)
|
||
#define PA04_SETLOW() (CW_GPIOA->BRR = bv4)
|
||
#define PA05_SETHIGH() (CW_GPIOA->BSRR = bv5)
|
||
#define PA05_SETLOW() (CW_GPIOA->BRR = bv5)
|
||
#define PA06_SETHIGH() (CW_GPIOA->BSRR = bv6)
|
||
#define PA06_SETLOW() (CW_GPIOA->BRR = bv6)
|
||
#define PA07_SETHIGH() (CW_GPIOA->BSRR = bv7)
|
||
#define PA07_SETLOW() (CW_GPIOA->BRR = bv7)
|
||
#define PA08_SETHIGH() (CW_GPIOA->BSRR = bv8)
|
||
#define PA08_SETLOW() (CW_GPIOA->BRR = bv8)
|
||
#define PA09_SETHIGH() (CW_GPIOA->BSRR = bv9)
|
||
#define PA09_SETLOW() (CW_GPIOA->BRR = bv9)
|
||
#define PA10_SETHIGH() (CW_GPIOA->BSRR = bv10)
|
||
#define PA10_SETLOW() (CW_GPIOA->BRR = bv10)
|
||
#define PA11_SETHIGH() (CW_GPIOA->BSRR = bv11)
|
||
#define PA11_SETLOW() (CW_GPIOA->BRR = bv11)
|
||
#define PA12_SETHIGH() (CW_GPIOA->BSRR = bv12)
|
||
#define PA12_SETLOW() (CW_GPIOA->BRR = bv12)
|
||
#define PA13_SETHIGH() (CW_GPIOA->BSRR = bv13)
|
||
#define PA13_SETLOW() (CW_GPIOA->BRR = bv13)
|
||
#define PA14_SETHIGH() (CW_GPIOA->BSRR = bv14)
|
||
#define PA14_SETLOW() (CW_GPIOA->BRR = bv14)
|
||
#define PA15_SETHIGH() (CW_GPIOA->BSRR = bv15)
|
||
#define PA15_SETLOW() (CW_GPIOA->BRR = bv15)
|
||
#define PB00_SETHIGH() (CW_GPIOB->BSRR = bv0)
|
||
#define PB00_SETLOW() (CW_GPIOB->BRR = bv0)
|
||
#define PB01_SETHIGH() (CW_GPIOB->BSRR = bv1)
|
||
#define PB01_SETLOW() (CW_GPIOB->BRR = bv1)
|
||
#define PB02_SETHIGH() (CW_GPIOB->BSRR = bv2)
|
||
#define PB02_SETLOW() (CW_GPIOB->BRR = bv2)
|
||
#define PB03_SETHIGH() (CW_GPIOB->BSRR = bv3)
|
||
#define PB03_SETLOW() (CW_GPIOB->BRR = bv3)
|
||
#define PB04_SETHIGH() (CW_GPIOB->BSRR = bv4)
|
||
#define PB04_SETLOW() (CW_GPIOB->BRR = bv4)
|
||
#define PB05_SETHIGH() (CW_GPIOB->BSRR = bv5)
|
||
#define PB05_SETLOW() (CW_GPIOB->BRR = bv5)
|
||
#define PB06_SETHIGH() (CW_GPIOB->BSRR = bv6)
|
||
#define PB06_SETLOW() (CW_GPIOB->BRR = bv6)
|
||
#define PB07_SETHIGH() (CW_GPIOB->BSRR = bv7)
|
||
#define PB07_SETLOW() (CW_GPIOB->BRR = bv7)
|
||
#define PB08_SETHIGH() (CW_GPIOB->BSRR = bv8)
|
||
#define PB08_SETLOW() (CW_GPIOB->BRR = bv8)
|
||
#define PB09_SETHIGH() (CW_GPIOB->BSRR = bv9)
|
||
#define PB09_SETLOW() (CW_GPIOB->BRR = bv9)
|
||
#define PB10_SETHIGH() (CW_GPIOB->BSRR = bv10)
|
||
#define PB10_SETLOW() (CW_GPIOB->BRR = bv10)
|
||
#define PB11_SETHIGH() (CW_GPIOB->BSRR = bv11)
|
||
#define PB11_SETLOW() (CW_GPIOB->BRR = bv11)
|
||
#define PB12_SETHIGH() (CW_GPIOB->BSRR = bv12)
|
||
#define PB12_SETLOW() (CW_GPIOB->BRR = bv12)
|
||
#define PB13_SETHIGH() (CW_GPIOB->BSRR = bv13)
|
||
#define PB13_SETLOW() (CW_GPIOB->BRR = bv13)
|
||
#define PB14_SETHIGH() (CW_GPIOB->BSRR = bv14)
|
||
#define PB14_SETLOW() (CW_GPIOB->BRR = bv14)
|
||
#define PB15_SETHIGH() (CW_GPIOB->BSRR = bv15)
|
||
#define PB15_SETLOW() (CW_GPIOB->BRR = bv15)
|
||
#define PC13_SETHIGH() (CW_GPIOC->BSRR = bv13)
|
||
#define PC13_SETLOW() (CW_GPIOC->BRR = bv13)
|
||
#define PC14_SETHIGH() (CW_GPIOC->BSRR = bv14)
|
||
#define PC14_SETLOW() (CW_GPIOC->BRR = bv14)
|
||
#define PC15_SETHIGH() (CW_GPIOC->BSRR = bv15)
|
||
#define PC15_SETLOW() (CW_GPIOC->BRR = bv15)
|
||
#define PF00_SETHIGH() (CW_GPIOF->BSRR = bv0)
|
||
#define PF00_SETLOW() (CW_GPIOF->BRR = bv0)
|
||
#define PF01_SETHIGH() (CW_GPIOF->BSRR = bv1)
|
||
#define PF01_SETLOW() (CW_GPIOF->BRR = bv1)
|
||
#define PF06_SETHIGH() (CW_GPIOF->BSRR = bv6)
|
||
#define PF06_SETLOW() (CW_GPIOF->BRR = bv6)
|
||
#define PF07_SETHIGH() (CW_GPIOF->BSRR = bv7)
|
||
#define PF07_SETLOW() (CW_GPIOF->BRR = bv7)
|
||
#define PF03_SETHIGH() (CW_GPIOF->BSRR = bv3)
|
||
#define PF03_SETLOW() (CW_GPIOF->BRR = bv3)
|
||
|
||
//============================================================
|
||
// TOG
|
||
#define PA00_TOG() (CW_GPIOA->TOG = bv0)
|
||
#define PA01_TOG() (CW_GPIOA->TOG = bv1)
|
||
#define PA02_TOG() (CW_GPIOA->TOG = bv2)
|
||
#define PA03_TOG() (CW_GPIOA->TOG = bv3)
|
||
#define PA04_TOG() (CW_GPIOA->TOG = bv4)
|
||
#define PA05_TOG() (CW_GPIOA->TOG = bv5)
|
||
#define PA06_TOG() (CW_GPIOA->TOG = bv6)
|
||
#define PA07_TOG() (CW_GPIOA->TOG = bv7)
|
||
#define PA08_TOG() (CW_GPIOA->TOG = bv8)
|
||
#define PA09_TOG() (CW_GPIOA->TOG = bv9)
|
||
#define PA10_TOG() (CW_GPIOA->TOG = bv10)
|
||
#define PA11_TOG() (CW_GPIOA->TOG = bv11)
|
||
#define PA12_TOG() (CW_GPIOA->TOG = bv12)
|
||
#define PA13_TOG() (CW_GPIOA->TOG = bv13)
|
||
#define PA14_TOG() (CW_GPIOA->TOG = bv14)
|
||
#define PA15_TOG() (CW_GPIOA->TOG = bv15)
|
||
#define PB00_TOG() (CW_GPIOB->TOG = bv0)
|
||
#define PB01_TOG() (CW_GPIOB->TOG = bv1)
|
||
#define PB02_TOG() (CW_GPIOB->TOG = bv2)
|
||
#define PB03_TOG() (CW_GPIOB->TOG = bv3)
|
||
#define PB04_TOG() (CW_GPIOB->TOG = bv4)
|
||
#define PB05_TOG() (CW_GPIOB->TOG = bv5)
|
||
#define PB06_TOG() (CW_GPIOB->TOG = bv6)
|
||
#define PB07_TOG() (CW_GPIOB->TOG = bv7)
|
||
#define PB08_TOG() (CW_GPIOB->TOG = bv8)
|
||
#define PB09_TOG() (CW_GPIOB->TOG = bv9)
|
||
#define PB10_TOG() (CW_GPIOB->TOG = bv10)
|
||
#define PB11_TOG() (CW_GPIOB->TOG = bv11)
|
||
#define PB12_TOG() (CW_GPIOB->TOG = bv12)
|
||
#define PB13_TOG() (CW_GPIOB->TOG = bv13)
|
||
#define PB14_TOG() (CW_GPIOB->TOG = bv14)
|
||
#define PB15_TOG() (CW_GPIOB->TOG = bv15)
|
||
#define PC13_TOG() (CW_GPIOC->TOG = bv13)
|
||
#define PC14_TOG() (CW_GPIOC->TOG = bv14)
|
||
#define PC15_TOG() (CW_GPIOC->TOG = bv15)
|
||
#define PF00_TOG() (CW_GPIOF->TOG = bv0)
|
||
#define PF01_TOG() (CW_GPIOF->TOG = bv1)
|
||
#define PF06_TOG() (CW_GPIOF->TOG = bv6)
|
||
#define PF07_TOG() (CW_GPIOF->TOG = bv7)
|
||
#define PF03_TOG() (CW_GPIOF->TOG = bv3)
|
||
|
||
//============================================================
|
||
// AF0 - AF7
|
||
#define PA00_AFx_GPIO() (CW_GPIOA->AFRL_f.AFR0 = 0)
|
||
#define PA00_AFx_UART3CTS() (CW_GPIOA->AFRL_f.AFR0 = 1)
|
||
#define PA00_AFx_UART2CTS() (CW_GPIOA->AFRL_f.AFR0 = 2)
|
||
#define PA00_AFx_RTCTAMP() (CW_GPIOA->AFRL_f.AFR0 = 3)
|
||
#define PA00_AFx_VC1OUT() (CW_GPIOA->AFRL_f.AFR0 = 4)
|
||
#define PA00_AFx_SPI2MISO() (CW_GPIOA->AFRL_f.AFR0 = 5)
|
||
#define PA00_AFx_GTIM2CH1() (CW_GPIOA->AFRL_f.AFR0 = 6)
|
||
#define PA00_AFx_GTIM2ETR() (CW_GPIOA->AFRL_f.AFR0 = 7)
|
||
#define PA01_AFx_GPIO() (CW_GPIOA->AFRL_f.AFR1 = 0)
|
||
#define PA01_AFx_UART3RTS() (CW_GPIOA->AFRL_f.AFR1 = 1)
|
||
#define PA01_AFx_UART2RTS() (CW_GPIOA->AFRL_f.AFR1 = 2)
|
||
#define PA01_AFx_I2C2SCL() (CW_GPIOA->AFRL_f.AFR1 = 3)
|
||
#define PA01_AFx_LVDOUT() (CW_GPIOA->AFRL_f.AFR1 = 4)
|
||
#define PA01_AFx_SPI2MOSI() (CW_GPIOA->AFRL_f.AFR1 = 5)
|
||
#define PA01_AFx_GTIM2CH2() (CW_GPIOA->AFRL_f.AFR1 = 6)
|
||
#define PA01_AFx_RTCTAMP() (CW_GPIOA->AFRL_f.AFR1 = 7)
|
||
#define PA02_AFx_GPIO() (CW_GPIOA->AFRL_f.AFR2 = 0)
|
||
#define PA02_AFx_UART3TXD() (CW_GPIOA->AFRL_f.AFR2 = 1)
|
||
#define PA02_AFx_UART2TXD() (CW_GPIOA->AFRL_f.AFR2 = 2)
|
||
#define PA02_AFx_I2C2SDA() (CW_GPIOA->AFRL_f.AFR2 = 3)
|
||
#define PA02_AFx_VC2OUT() (CW_GPIOA->AFRL_f.AFR2 = 4)
|
||
#define PA02_AFx_SPI2SCK() (CW_GPIOA->AFRL_f.AFR2 = 5)
|
||
#define PA02_AFx_GTIM2CH3() (CW_GPIOA->AFRL_f.AFR2 = 6)
|
||
#define PA02_AFx_AWTETR() (CW_GPIOA->AFRL_f.AFR2 = 7)
|
||
#define PA03_AFx_GPIO() (CW_GPIOA->AFRL_f.AFR3 = 0)
|
||
#define PA03_AFx_UART3RXD() (CW_GPIOA->AFRL_f.AFR3 = 1)
|
||
#define PA03_AFx_UART2RXD() (CW_GPIOA->AFRL_f.AFR3 = 2)
|
||
#define PA03_AFx_GTIM2CH2() (CW_GPIOA->AFRL_f.AFR3 = 3)
|
||
#define PA03_AFx_PCLKOUT() (CW_GPIOA->AFRL_f.AFR3 = 4)
|
||
#define PA03_AFx_SPI2CS() (CW_GPIOA->AFRL_f.AFR3 = 5)
|
||
#define PA03_AFx_GTIM2CH4() (CW_GPIOA->AFRL_f.AFR3 = 6)
|
||
#define PA03_AFx_ATIMCH3A() (CW_GPIOA->AFRL_f.AFR3 = 7)
|
||
#define PA04_AFx_GPIO() (CW_GPIOA->AFRL_f.AFR4 = 0)
|
||
#define PA04_AFx_UART2CTS() (CW_GPIOA->AFRL_f.AFR4 = 2)
|
||
#define PA04_AFx_I2C2SCL() (CW_GPIOA->AFRL_f.AFR4 = 3)
|
||
#define PA04_AFx_HCLKOUT() (CW_GPIOA->AFRL_f.AFR4 = 4)
|
||
#define PA04_AFx_SPI1CS() (CW_GPIOA->AFRL_f.AFR4 = 5)
|
||
#define PA04_AFx_GTIM2ETR() (CW_GPIOA->AFRL_f.AFR4 = 6)
|
||
#define PA04_AFx_ATIMCH2A() (CW_GPIOA->AFRL_f.AFR4 = 7)
|
||
#define PA05_AFx_GPIO() (CW_GPIOA->AFRL_f.AFR5 = 0)
|
||
#define PA05_AFx_GTIM2ETR() (CW_GPIOA->AFRL_f.AFR5 = 1)
|
||
#define PA05_AFx_UART2RTS() (CW_GPIOA->AFRL_f.AFR5 = 2)
|
||
#define PA05_AFx_I2C2SDA() (CW_GPIOA->AFRL_f.AFR5 = 3)
|
||
#define PA05_AFx_BTIM2TOGP() (CW_GPIOA->AFRL_f.AFR5 = 4)
|
||
#define PA05_AFx_SPI1SCK() (CW_GPIOA->AFRL_f.AFR5 = 5)
|
||
#define PA05_AFx_GTIM2CH1() (CW_GPIOA->AFRL_f.AFR5 = 6)
|
||
#define PA05_AFx_ATIMCH1A() (CW_GPIOA->AFRL_f.AFR5 = 7)
|
||
#define PA06_AFx_GPIO() (CW_GPIOA->AFRL_f.AFR6 = 0)
|
||
#define PA06_AFx_GTIM3CH1() (CW_GPIOA->AFRL_f.AFR6 = 1)
|
||
#define PA06_AFx_UART2TXD() (CW_GPIOA->AFRL_f.AFR6 = 2)
|
||
#define PA06_AFx_VC1OUT() (CW_GPIOA->AFRL_f.AFR6 = 3)
|
||
#define PA06_AFx_BTIM2TOGN() (CW_GPIOA->AFRL_f.AFR6 = 4)
|
||
#define PA06_AFx_SPI1MISO() (CW_GPIOA->AFRL_f.AFR6 = 5)
|
||
#define PA06_AFx_GTIM1CH1() (CW_GPIOA->AFRL_f.AFR6 = 6)
|
||
#define PA06_AFx_ATIMBK() (CW_GPIOA->AFRL_f.AFR6 = 7)
|
||
#define PA07_AFx_GPIO() (CW_GPIOA->AFRL_f.AFR7 = 0)
|
||
#define PA07_AFx_GTIM4CH1() (CW_GPIOA->AFRL_f.AFR7 = 1)
|
||
#define PA07_AFx_UART2RXD() (CW_GPIOA->AFRL_f.AFR7 = 2)
|
||
#define PA07_AFx_VC2OUT() (CW_GPIOA->AFRL_f.AFR7 = 3)
|
||
#define PA07_AFx_BTIM1TOGP() (CW_GPIOA->AFRL_f.AFR7 = 4)
|
||
#define PA07_AFx_SPI1MOSI() (CW_GPIOA->AFRL_f.AFR7 = 5)
|
||
#define PA07_AFx_GTIM1CH2() (CW_GPIOA->AFRL_f.AFR7 = 6)
|
||
#define PA07_AFx_ATIMCH1B() (CW_GPIOA->AFRL_f.AFR7 = 7)
|
||
#define PA08_AFx_GPIO() (CW_GPIOA->AFRH_f.AFR8 = 0)
|
||
#define PA08_AFx_UART1TXD() (CW_GPIOA->AFRH_f.AFR8 = 2)
|
||
#define PA08_AFx_BTIM2TOGN() (CW_GPIOA->AFRH_f.AFR8 = 3)
|
||
#define PA08_AFx_MCO() (CW_GPIOA->AFRH_f.AFR8 = 4)
|
||
#define PA08_AFx_LVDOUT() (CW_GPIOA->AFRH_f.AFR8 = 5)
|
||
#define PA08_AFx_GTIM3ETR() (CW_GPIOA->AFRH_f.AFR8 = 6)
|
||
#define PA08_AFx_ATIMCH1A() (CW_GPIOA->AFRH_f.AFR8 = 7)
|
||
#define PA09_AFx_GPIO() (CW_GPIOA->AFRH_f.AFR9 = 0)
|
||
#define PA09_AFx_UART3TXD() (CW_GPIOA->AFRH_f.AFR9 = 1)
|
||
#define PA09_AFx_UART1RXD() (CW_GPIOA->AFRH_f.AFR9 = 2)
|
||
#define PA09_AFx_I2C1SCL() (CW_GPIOA->AFRH_f.AFR9 = 3)
|
||
#define PA09_AFx_BTIM1TOGP() (CW_GPIOA->AFRH_f.AFR9 = 4)
|
||
#define PA09_AFx_SPI1CS() (CW_GPIOA->AFRH_f.AFR9 = 5)
|
||
#define PA09_AFx_GTIM3CH1() (CW_GPIOA->AFRH_f.AFR9 = 6)
|
||
#define PA09_AFx_ATIMCH2A() (CW_GPIOA->AFRH_f.AFR9 = 7)
|
||
#define PA10_AFx_GPIO() (CW_GPIOA->AFRH_f.AFR10 = 0)
|
||
#define PA10_AFx_UART3RXD() (CW_GPIOA->AFRH_f.AFR10 = 1)
|
||
#define PA10_AFx_UART1CTS() (CW_GPIOA->AFRH_f.AFR10 = 2)
|
||
#define PA10_AFx_I2C1SDA() (CW_GPIOA->AFRH_f.AFR10 = 3)
|
||
#define PA10_AFx_BTIM1TOGN() (CW_GPIOA->AFRH_f.AFR10 = 4)
|
||
#define PA10_AFx_SPI1SCK() (CW_GPIOA->AFRH_f.AFR10 = 5)
|
||
#define PA10_AFx_GTIM3CH2() (CW_GPIOA->AFRH_f.AFR10 = 6)
|
||
#define PA10_AFx_ATIMCH3A() (CW_GPIOA->AFRH_f.AFR10 = 7)
|
||
#define PA11_AFx_GPIO() (CW_GPIOA->AFRH_f.AFR11 = 0)
|
||
#define PA11_AFx_UART3CTS() (CW_GPIOA->AFRH_f.AFR11 = 1)
|
||
#define PA11_AFx_UART1RTS() (CW_GPIOA->AFRH_f.AFR11 = 2)
|
||
#define PA11_AFx_I2C2SCL() (CW_GPIOA->AFRH_f.AFR11 = 3)
|
||
#define PA11_AFx_VC1OUT() (CW_GPIOA->AFRH_f.AFR11 = 4)
|
||
#define PA11_AFx_SPI1MISO() (CW_GPIOA->AFRH_f.AFR11 = 5)
|
||
#define PA11_AFx_GTIM3CH3() (CW_GPIOA->AFRH_f.AFR11 = 6)
|
||
#define PA11_AFx_ATIMGATE() (CW_GPIOA->AFRH_f.AFR11 = 7)
|
||
#define PA12_AFx_GPIO() (CW_GPIOA->AFRH_f.AFR12 = 0)
|
||
#define PA12_AFx_UART3RTS() (CW_GPIOA->AFRH_f.AFR12 = 1)
|
||
#define PA12_AFx_BTIMETR() (CW_GPIOA->AFRH_f.AFR12 = 2)
|
||
#define PA12_AFx_I2C2SDA() (CW_GPIOA->AFRH_f.AFR12 = 3)
|
||
#define PA12_AFx_VC2OUT() (CW_GPIOA->AFRH_f.AFR12 = 4)
|
||
#define PA12_AFx_SPI1MOSI() (CW_GPIOA->AFRH_f.AFR12 = 5)
|
||
#define PA12_AFx_GTIM3CH4() (CW_GPIOA->AFRH_f.AFR12 = 6)
|
||
#define PA12_AFx_ATIMETR() (CW_GPIOA->AFRH_f.AFR12 = 7)
|
||
#define PA13_AFx_GPIO() (CW_GPIOA->AFRH_f.AFR13 = 0)
|
||
#define PA13_AFx_I2C1SDA() (CW_GPIOA->AFRH_f.AFR13 = 2)
|
||
#define PA13_AFx_UART1RXD() (CW_GPIOA->AFRH_f.AFR13 = 3)
|
||
#define PA13_AFx_UART2RXD() (CW_GPIOA->AFRH_f.AFR13 = 4)
|
||
#define PA13_AFx_I2C2SCL() (CW_GPIOA->AFRH_f.AFR13 = 5)
|
||
#define PA13_AFx_IROUT() (CW_GPIOA->AFRH_f.AFR13 = 6)
|
||
#define PA14_AFx_GPIO() (CW_GPIOA->AFRH_f.AFR14 = 0)
|
||
#define PA14_AFx_UART3TXD() (CW_GPIOA->AFRH_f.AFR14 = 1)
|
||
#define PA14_AFx_I2C1SCL() (CW_GPIOA->AFRH_f.AFR14 = 2)
|
||
#define PA14_AFx_UART1TXD() (CW_GPIOA->AFRH_f.AFR14 = 3)
|
||
#define PA14_AFx_UART2TXD() (CW_GPIOA->AFRH_f.AFR14 = 4)
|
||
#define PA14_AFx_I2C2SDA() (CW_GPIOA->AFRH_f.AFR14 = 5)
|
||
#define PA15_AFx_GPIO() (CW_GPIOA->AFRH_f.AFR15 = 0)
|
||
#define PA15_AFx_UART3RXD() (CW_GPIOA->AFRH_f.AFR15 = 1)
|
||
#define PA15_AFx_GTIM2CH1() (CW_GPIOA->AFRH_f.AFR15 = 2)
|
||
#define PA15_AFx_UART1RXD() (CW_GPIOA->AFRH_f.AFR15 = 3)
|
||
#define PA15_AFx_UART2RXD() (CW_GPIOA->AFRH_f.AFR15 = 4)
|
||
#define PA15_AFx_SPI1CS() (CW_GPIOA->AFRH_f.AFR15 = 5)
|
||
#define PA15_AFx_GTIM2ETR() (CW_GPIOA->AFRH_f.AFR15 = 6)
|
||
#define PA15_AFx_ATIMCH1B() (CW_GPIOA->AFRH_f.AFR15 = 7)
|
||
#define PB00_AFx_GPIO() (CW_GPIOB->AFRL_f.AFR0 = 0)
|
||
#define PB00_AFx_UART2RXD() (CW_GPIOB->AFRL_f.AFR0 = 1)
|
||
#define PB00_AFx_UART1CTS() (CW_GPIOB->AFRL_f.AFR0 = 2)
|
||
#define PB00_AFx_I2C2SCL() (CW_GPIOB->AFRL_f.AFR0 = 3)
|
||
#define PB00_AFx_BTIM1TOGN() (CW_GPIOB->AFRL_f.AFR0 = 4)
|
||
#define PB00_AFx_HSIOUT() (CW_GPIOB->AFRL_f.AFR0 = 5)
|
||
#define PB00_AFx_GTIM1CH3() (CW_GPIOB->AFRL_f.AFR0 = 6)
|
||
#define PB00_AFx_ATIMCH2B() (CW_GPIOB->AFRL_f.AFR0 = 7)
|
||
#define PB01_AFx_GPIO() (CW_GPIOB->AFRL_f.AFR1 = 0)
|
||
#define PB01_AFx_UART2TXD() (CW_GPIOB->AFRL_f.AFR1 = 1)
|
||
#define PB01_AFx_UART1RTS() (CW_GPIOB->AFRL_f.AFR1 = 2)
|
||
#define PB01_AFx_I2C2SDA() (CW_GPIOB->AFRL_f.AFR1 = 3)
|
||
#define PB01_AFx_GTIM4TOGN() (CW_GPIOB->AFRL_f.AFR1 = 4)
|
||
#define PB01_AFx_BTIM3TOGP() (CW_GPIOB->AFRL_f.AFR1 = 5)
|
||
#define PB01_AFx_GTIM1CH4() (CW_GPIOB->AFRL_f.AFR1 = 6)
|
||
#define PB01_AFx_ATIMCH3B() (CW_GPIOB->AFRL_f.AFR1 = 7)
|
||
#define PB02_AFx_GPIO() (CW_GPIOB->AFRL_f.AFR2 = 0)
|
||
#define PB02_AFx_UART2CTS() (CW_GPIOB->AFRL_f.AFR2 = 1)
|
||
#define PB02_AFx_UART1TXD() (CW_GPIOB->AFRL_f.AFR2 = 2)
|
||
#define PB02_AFx_HSEOUT() (CW_GPIOB->AFRL_f.AFR2 = 3)
|
||
#define PB02_AFx_GTIM4TOGP() (CW_GPIOB->AFRL_f.AFR2 = 4)
|
||
#define PB02_AFx_BTIM3TOGN() (CW_GPIOB->AFRL_f.AFR2 = 5)
|
||
#define PB02_AFx_GTIM1ETR() (CW_GPIOB->AFRL_f.AFR2 = 6)
|
||
#define PB02_AFx_ATIMCH1A() (CW_GPIOB->AFRL_f.AFR2 = 7)
|
||
#define PB03_AFx_GPIO() (CW_GPIOB->AFRL_f.AFR3 = 0)
|
||
#define PB03_AFx_UART3RTS() (CW_GPIOB->AFRL_f.AFR3 = 1)
|
||
#define PB03_AFx_GTIM2CH2() (CW_GPIOB->AFRL_f.AFR3 = 2)
|
||
#define PB03_AFx_UART1CTS() (CW_GPIOB->AFRL_f.AFR3 = 3)
|
||
#define PB03_AFx_UART2TXD() (CW_GPIOB->AFRL_f.AFR3 = 4)
|
||
#define PB03_AFx_SPI1SCK() (CW_GPIOB->AFRL_f.AFR3 = 5)
|
||
#define PB03_AFx_GTIM1ETR() (CW_GPIOB->AFRL_f.AFR3 = 6)
|
||
#define PB03_AFx_ATIMCH2B() (CW_GPIOB->AFRL_f.AFR3 = 7)
|
||
#define PB04_AFx_GPIO() (CW_GPIOB->AFRL_f.AFR4 = 0)
|
||
#define PB04_AFx_UART3CTS() (CW_GPIOB->AFRL_f.AFR4 = 1)
|
||
#define PB04_AFx_GTIM4ETR() (CW_GPIOB->AFRL_f.AFR4 = 2)
|
||
#define PB04_AFx_UART1RTS() (CW_GPIOB->AFRL_f.AFR4 = 3)
|
||
#define PB04_AFx_UART2CTS() (CW_GPIOB->AFRL_f.AFR4 = 4)
|
||
#define PB04_AFx_SPI1MISO() (CW_GPIOB->AFRL_f.AFR4 = 5)
|
||
#define PB04_AFx_GTIM1CH1() (CW_GPIOB->AFRL_f.AFR4 = 6)
|
||
#define PB04_AFx_ATIMCH3B() (CW_GPIOB->AFRL_f.AFR4 = 7)
|
||
#define PB05_AFx_GPIO() (CW_GPIOB->AFRL_f.AFR5 = 0)
|
||
#define PB05_AFx_GTIM3CH4() (CW_GPIOB->AFRL_f.AFR5 = 2)
|
||
#define PB05_AFx_AWTETR() (CW_GPIOB->AFRL_f.AFR5 = 3)
|
||
#define PB05_AFx_UART2RTS() (CW_GPIOB->AFRL_f.AFR5 = 4)
|
||
#define PB05_AFx_SPI1MOSI() (CW_GPIOB->AFRL_f.AFR5 = 5)
|
||
#define PB05_AFx_GTIM1CH2() (CW_GPIOB->AFRL_f.AFR5 = 6)
|
||
#define PB05_AFx_ATIMCH1A() (CW_GPIOB->AFRL_f.AFR5 = 7)
|
||
#define PB06_AFx_GPIO() (CW_GPIOB->AFRL_f.AFR6 = 0)
|
||
#define PB06_AFx_UART3TXD() (CW_GPIOB->AFRL_f.AFR6 = 1)
|
||
#define PB06_AFx_GTIM3CH3() (CW_GPIOB->AFRL_f.AFR6 = 2)
|
||
#define PB06_AFx_I2C1SCL() (CW_GPIOB->AFRL_f.AFR6 = 3)
|
||
#define PB06_AFx_GTIM4CH4() (CW_GPIOB->AFRL_f.AFR6 = 4)
|
||
#define PB06_AFx_SPI2MOSI() (CW_GPIOB->AFRL_f.AFR6 = 5)
|
||
#define PB06_AFx_GTIM1TOGN() (CW_GPIOB->AFRL_f.AFR6 = 6)
|
||
#define PB06_AFx_ATIMCH2A() (CW_GPIOB->AFRL_f.AFR6 = 7)
|
||
#define PB07_AFx_GPIO() (CW_GPIOB->AFRL_f.AFR7 = 0)
|
||
#define PB07_AFx_UART3RXD() (CW_GPIOB->AFRL_f.AFR7 = 1)
|
||
#define PB07_AFx_GTIM3CH2() (CW_GPIOB->AFRL_f.AFR7 = 2)
|
||
#define PB07_AFx_I2C1SDA() (CW_GPIOB->AFRL_f.AFR7 = 3)
|
||
#define PB07_AFx_GTIM4CH3() (CW_GPIOB->AFRL_f.AFR7 = 4)
|
||
#define PB07_AFx_SPI2MISO() (CW_GPIOB->AFRL_f.AFR7 = 5)
|
||
#define PB07_AFx_GTIM1TOGP() (CW_GPIOB->AFRL_f.AFR7 = 6)
|
||
#define PB07_AFx_ATIMCH3A() (CW_GPIOB->AFRL_f.AFR7 = 7)
|
||
#define PB08_AFx_GPIO() (CW_GPIOB->AFRH_f.AFR8 = 0)
|
||
#define PB08_AFx_I2C1SCL() (CW_GPIOB->AFRH_f.AFR8 = 1)
|
||
#define PB08_AFx_GTIM3CH1() (CW_GPIOB->AFRH_f.AFR8 = 2)
|
||
#define PB08_AFx_UART1TXD() (CW_GPIOB->AFRH_f.AFR8 = 3)
|
||
#define PB08_AFx_GTIM4CH2() (CW_GPIOB->AFRH_f.AFR8 = 4)
|
||
#define PB08_AFx_SPI2SCK() (CW_GPIOB->AFRH_f.AFR8 = 5)
|
||
#define PB08_AFx_GTIM1CH3() (CW_GPIOB->AFRH_f.AFR8 = 6)
|
||
#define PB08_AFx_ATIMETR() (CW_GPIOB->AFRH_f.AFR8 = 7)
|
||
#define PB09_AFx_GPIO() (CW_GPIOB->AFRH_f.AFR9 = 0)
|
||
#define PB09_AFx_I2C1SDA() (CW_GPIOB->AFRH_f.AFR9 = 1)
|
||
#define PB09_AFx_GTIM4CH1() (CW_GPIOB->AFRH_f.AFR9 = 2)
|
||
#define PB09_AFx_UART1RXD() (CW_GPIOB->AFRH_f.AFR9 = 3)
|
||
#define PB09_AFx_IROUT() (CW_GPIOB->AFRH_f.AFR9 = 4)
|
||
#define PB09_AFx_SPI2CS() (CW_GPIOB->AFRH_f.AFR9 = 5)
|
||
#define PB09_AFx_GTIM1CH4() (CW_GPIOB->AFRH_f.AFR9 = 6)
|
||
#define PB09_AFx_ATIMBK() (CW_GPIOB->AFRH_f.AFR9 = 7)
|
||
#define PB10_AFx_GPIO() (CW_GPIOB->AFRH_f.AFR10 = 0)
|
||
#define PB10_AFx_UART2RTS() (CW_GPIOB->AFRH_f.AFR10 = 1)
|
||
#define PB10_AFx_UART1RXD() (CW_GPIOB->AFRH_f.AFR10 = 2)
|
||
#define PB10_AFx_I2C1SCL() (CW_GPIOB->AFRH_f.AFR10 = 3)
|
||
#define PB10_AFx_I2C2SCL() (CW_GPIOB->AFRH_f.AFR10 = 4)
|
||
#define PB10_AFx_SPI2SCK() (CW_GPIOB->AFRH_f.AFR10 = 5)
|
||
#define PB10_AFx_GTIM2CH3() (CW_GPIOB->AFRH_f.AFR10 = 6)
|
||
#define PB10_AFx_ATIMCH2A() (CW_GPIOB->AFRH_f.AFR10 = 7)
|
||
#define PB11_AFx_GPIO() (CW_GPIOB->AFRH_f.AFR11 = 0)
|
||
#define PB11_AFx_LSIOUT() (CW_GPIOB->AFRH_f.AFR11 = 1)
|
||
#define PB11_AFx_GTIM4ETR() (CW_GPIOB->AFRH_f.AFR11 = 2)
|
||
#define PB11_AFx_I2C1SDA() (CW_GPIOB->AFRH_f.AFR11 = 3)
|
||
#define PB11_AFx_I2C2SDA() (CW_GPIOB->AFRH_f.AFR11 = 4)
|
||
#define PB11_AFx_BTIMETR() (CW_GPIOB->AFRH_f.AFR11 = 5)
|
||
#define PB11_AFx_GTIM2CH4() (CW_GPIOB->AFRH_f.AFR11 = 6)
|
||
#define PB11_AFx_ATIMCH3A() (CW_GPIOB->AFRH_f.AFR11 = 7)
|
||
#define PB12_AFx_GPIO() (CW_GPIOB->AFRH_f.AFR12 = 0)
|
||
#define PB12_AFx_GTIM2TOGN() (CW_GPIOB->AFRH_f.AFR12 = 1)
|
||
#define PB12_AFx_GTIM4CH4() (CW_GPIOB->AFRH_f.AFR12 = 2)
|
||
#define PB12_AFx_LSEOUT() (CW_GPIOB->AFRH_f.AFR12 = 3)
|
||
#define PB12_AFx_SPI2CS() (CW_GPIOB->AFRH_f.AFR12 = 4)
|
||
#define PB12_AFx_SPI1CS() (CW_GPIOB->AFRH_f.AFR12 = 5)
|
||
#define PB12_AFx_GTIM1TOGN() (CW_GPIOB->AFRH_f.AFR12 = 6)
|
||
#define PB12_AFx_ATIMBK() (CW_GPIOB->AFRH_f.AFR12 = 7)
|
||
#define PB13_AFx_GPIO() (CW_GPIOB->AFRH_f.AFR13 = 0)
|
||
#define PB13_AFx_GTIM2TOGP() (CW_GPIOB->AFRH_f.AFR13 = 1)
|
||
#define PB13_AFx_GTIM4CH3() (CW_GPIOB->AFRH_f.AFR13 = 2)
|
||
#define PB13_AFx_I2C2SCL() (CW_GPIOB->AFRH_f.AFR13 = 3)
|
||
#define PB13_AFx_SPI2SCK() (CW_GPIOB->AFRH_f.AFR13 = 4)
|
||
#define PB13_AFx_SPI1SCK() (CW_GPIOB->AFRH_f.AFR13 = 5)
|
||
#define PB13_AFx_GTIM1TOGP() (CW_GPIOB->AFRH_f.AFR13 = 6)
|
||
#define PB13_AFx_ATIMCH1B() (CW_GPIOB->AFRH_f.AFR13 = 7)
|
||
#define PB14_AFx_GPIO() (CW_GPIOB->AFRH_f.AFR14 = 0)
|
||
#define PB14_AFx_GTIM2CH1() (CW_GPIOB->AFRH_f.AFR14 = 1)
|
||
#define PB14_AFx_GTIM4CH2() (CW_GPIOB->AFRH_f.AFR14 = 2)
|
||
#define PB14_AFx_I2C2SDA() (CW_GPIOB->AFRH_f.AFR14 = 3)
|
||
#define PB14_AFx_SPI2MISO() (CW_GPIOB->AFRH_f.AFR14 = 4)
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#define PB14_AFx_SPI1MISO() (CW_GPIOB->AFRH_f.AFR14 = 5)
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#define PB14_AFx_RTCOUT() (CW_GPIOB->AFRH_f.AFR14 = 6)
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#define PB14_AFx_ATIMCH2B() (CW_GPIOB->AFRH_f.AFR14 = 7)
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#define PB15_AFx_GPIO() (CW_GPIOB->AFRH_f.AFR15 = 0)
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#define PB15_AFx_GTIM2CH2() (CW_GPIOB->AFRH_f.AFR15 = 1)
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#define PB15_AFx_GTIM4CH1() (CW_GPIOB->AFRH_f.AFR15 = 2)
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#define PB15_AFx_BTIM2TOGP() (CW_GPIOB->AFRH_f.AFR15 = 3)
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#define PB15_AFx_SPI2MOSI() (CW_GPIOB->AFRH_f.AFR15 = 4)
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#define PB15_AFx_SPI1MOSI() (CW_GPIOB->AFRH_f.AFR15 = 5)
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#define PB15_AFx_RTC1Hz() (CW_GPIOB->AFRH_f.AFR15 = 6)
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#define PB15_AFx_ATIMCH3B() (CW_GPIOB->AFRH_f.AFR15 = 7)
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#define PC13_AFx_GPIO() (CW_GPIOC->AFRH_f.AFR13 = 0)
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#define PC13_AFx_PLLOUT() (CW_GPIOC->AFRH_f.AFR13 = 1)
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#define PC13_AFx_RTC1Hz() (CW_GPIOC->AFRH_f.AFR13 = 2)
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#define PC13_AFx_UART1CTS() (CW_GPIOC->AFRH_f.AFR13 = 3)
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#define PC13_AFx_RTCOUT() (CW_GPIOC->AFRH_f.AFR13 = 4)
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#define PC13_AFx_BTIMETR() (CW_GPIOC->AFRH_f.AFR13 = 5)
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#define PC13_AFx_GTIM3ETR() (CW_GPIOC->AFRH_f.AFR13 = 6)
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#define PC13_AFx_RTCTAMP() (CW_GPIOC->AFRH_f.AFR13 = 7)
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#define PC14_AFx_GPIO() (CW_GPIOC->AFRH_f.AFR14 = 0)
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#define PC14_AFx_AWTETR() (CW_GPIOC->AFRH_f.AFR14 = 1)
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#define PC14_AFx_GTIM4CH4() (CW_GPIOC->AFRH_f.AFR14 = 2)
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#define PC14_AFx_UART1RTS() (CW_GPIOC->AFRH_f.AFR14 = 3)
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#define PC14_AFx_BTIM2TOGP() (CW_GPIOC->AFRH_f.AFR14 = 4)
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#define PC14_AFx_SPI2MISO() (CW_GPIOC->AFRH_f.AFR14 = 5)
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#define PC14_AFx_GTIM3TOGN() (CW_GPIOC->AFRH_f.AFR14 = 6)
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#define PC14_AFx_GTIM3CH1() (CW_GPIOC->AFRH_f.AFR14 = 7)
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#define PC15_AFx_GPIO() (CW_GPIOC->AFRH_f.AFR15 = 0)
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#define PC15_AFx_HSEOUT() (CW_GPIOC->AFRH_f.AFR15 = 1)
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#define PC15_AFx_GTIM4CH3() (CW_GPIOC->AFRH_f.AFR15 = 2)
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#define PC15_AFx_GTIM4ETR() (CW_GPIOC->AFRH_f.AFR15 = 3)
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#define PC15_AFx_BTIM2TOGN() (CW_GPIOC->AFRH_f.AFR15 = 4)
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#define PC15_AFx_SPI2MOSI() (CW_GPIOC->AFRH_f.AFR15 = 5)
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#define PC15_AFx_GTIM3TOGP() (CW_GPIOC->AFRH_f.AFR15 = 6)
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#define PC15_AFx_GTIM3CH2() (CW_GPIOC->AFRH_f.AFR15 = 7)
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#define PF00_AFx_GPIO() (CW_GPIOF->AFRL_f.AFR0 = 0)
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#define PF00_AFx_AWTETR() (CW_GPIOF->AFRL_f.AFR0 = 1)
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#define PF00_AFx_GTIM4CH2() (CW_GPIOF->AFRL_f.AFR0 = 2)
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#define PF00_AFx_I2C1SDA() (CW_GPIOF->AFRL_f.AFR0 = 3)
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#define PF00_AFx_BTIM1TOGP() (CW_GPIOF->AFRL_f.AFR0 = 4)
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#define PF00_AFx_SPI2SCK() (CW_GPIOF->AFRL_f.AFR0 = 5)
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#define PF00_AFx_GTIM2TOGN() (CW_GPIOF->AFRL_f.AFR0 = 6)
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#define PF00_AFx_GTIM3CH3() (CW_GPIOF->AFRL_f.AFR0 = 7)
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#define PF01_AFx_GPIO() (CW_GPIOF->AFRL_f.AFR1 = 0)
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#define PF01_AFx_LSEOUT() (CW_GPIOF->AFRL_f.AFR1 = 1)
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#define PF01_AFx_GTIM4CH1() (CW_GPIOF->AFRL_f.AFR1 = 2)
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#define PF01_AFx_I2C1SCL() (CW_GPIOF->AFRL_f.AFR1 = 3)
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#define PF01_AFx_BTIM1TOGN() (CW_GPIOF->AFRL_f.AFR1 = 4)
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#define PF01_AFx_SPI2CS() (CW_GPIOF->AFRL_f.AFR1 = 5)
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#define PF01_AFx_GTIM2TOGP() (CW_GPIOF->AFRL_f.AFR1 = 6)
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#define PF01_AFx_GTIM3CH4() (CW_GPIOF->AFRL_f.AFR1 = 7)
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#define PF06_AFx_GPIO() (CW_GPIOF->AFRL_f.AFR6 = 0)
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#define PF06_AFx_UART3CTS() (CW_GPIOF->AFRL_f.AFR6 = 1)
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#define PF06_AFx_I2C1SCL() (CW_GPIOF->AFRL_f.AFR6 = 2)
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#define PF06_AFx_GTIM4TOGN() (CW_GPIOF->AFRL_f.AFR6 = 3)
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#define PF06_AFx_UART2CTS() (CW_GPIOF->AFRL_f.AFR6 = 4)
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#define PF06_AFx_I2C2SCL() (CW_GPIOF->AFRL_f.AFR6 = 5)
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#define PF06_AFx_GTIM3TOGN() (CW_GPIOF->AFRL_f.AFR6 = 6)
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#define PF06_AFx_BTIM3TOGP() (CW_GPIOF->AFRL_f.AFR6 = 7)
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#define PF07_AFx_GPIO() (CW_GPIOF->AFRL_f.AFR7 = 0)
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#define PF07_AFx_UART3RTS() (CW_GPIOF->AFRL_f.AFR7 = 1)
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#define PF07_AFx_I2C1SDA() (CW_GPIOF->AFRL_f.AFR7 = 2)
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#define PF07_AFx_GTIM4TOGP() (CW_GPIOF->AFRL_f.AFR7 = 3)
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#define PF07_AFx_UART2RTS() (CW_GPIOF->AFRL_f.AFR7 = 4)
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#define PF07_AFx_I2C2SDA() (CW_GPIOF->AFRL_f.AFR7 = 5)
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#define PF07_AFx_GTIM3TOGP() (CW_GPIOF->AFRL_f.AFR7 = 6)
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#define PF07_AFx_BTIM3TOGN() (CW_GPIOF->AFRL_f.AFR7 = 7)
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#define PF03_AFx_GPIO() (CW_GPIOF->AFRL_f.AFR3 = 0)
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//============================================================
|
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|
||
#ifdef __cplusplus
|
||
}
|
||
#endif
|
||
|
||
#endif
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